s1r72801 Epson Electronics America, Inc., s1r72801 Datasheet - Page 81

• Manufacturer Part Number: s1r72801
• Description: Ieee1394 Controller S1r72801f00a
• Manufacturer: Epson Electronics America, Inc.

RxORBAreaStart
TxHeaderAreaStart
TxStreamAreaStart
TxStreamAreaEnd
RxStreamAreaStart
Bus Reset Header Pointer Register
Address Register Name
Memory Map Area Index/Window Register
AreaIndex
0x0F
0x00
0x01
0x02
0x03
0x04
0x05
0x58
0x59
:
This register sets the starting address of a receive ORB data area.
This register sets the starting address of a transmit header area.
This register sets the starting address of a transmit stream data area.
This register sets the ending address of a transmit stream data area. The actual data store area is up to
immediately before this specified address.
This register sets the starting address of a receive stream data area.
This Bus Reset Header Pointer Register holds the value of a PostRxHdrPtr when a bus reset occurs. When
several bus resets occur, it is updated to the latest PostRxHdrPtr. This register is read-only and writing to this
register is ignored.
BRstHdrPtr_H
BRstHdrPtr_L
RxStreamAreaStart_H
TxStreamAreaStart_H
RxStreamAreaStart_L
TxStreamAreaStart_L
TxStreamAreaEnd_H
TxStreamAreaEnd_L
RxORBAreaStart_H
RxORBAreaStart_L
AreaWindow_H/L
TxHdrAreaStart_H
TxHdrAreaStart_L
(Reserved)
(Reserved)
(Reserved)
7: BusResetPtr[7]
7:
6:
5:
4: BusResetPtr[12]
3: BusResetPtr[11]
2: BusResetPtr[10]
1: BusResetPtr[9]
0: BusResetPtr[8]
6: BusResetPtr[6]
5: BusResetPtr[5]
4:
3:
2:
1:
0:
Bit Symbol
bit7
bit6
TxStreamAreaStart[7:2]
RxStreamAreaStart[7:2]
TxStreamAreaEnd[7:2]
RxORBAreaStart[7:2]
TxHdrAreaStart[7:2]
R/W
EPSON
R
bit5
Write is ignore
Bus Reset Header Area Pointer
This register indicates Address
in Rx Header Area
when BusRest detected.
Write is ignore
Read is always zero
Read is always zero
(MSB)
(MSB)
(MSB)
(MSB)
(MSB)
bit4
Description
bit3
TxStreamAreaStart[12:8]
RxStreamAreaStart[12:8]
TxStreamAreaEnd[12:8]
RxORBAreaStart[12:8]
TxHdrAreaStart[12:8]
(LSB)
(LSB)
(LSB)
(LSB)
(LSB)
bit2
H.Rst S.Rst B.Rst
S1R72801F00A
0x00 0x00
0x00 0x00
bit1
bit0
–
–
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