s1r72801 Epson Electronics America, Inc., s1r72801 Datasheet - Page 84

• Manufacturer Part Number: s1r72801
• Description: Ieee1394 Controller S1r72801f00a
• Manufacturer: Epson Electronics America, Inc.

S1R72801F00A
IDE Configuration Register
Bit7 IDE_Reset
Bit6::0 Reserved
IDE Register Access Cycle Register
Bit7::4 Assert Pulse
Bit3::0 Negate Pulse
80
Address
Address Register Name
0x62
0x61
This register sets the mode of operation of the IDE interface of this IC.
Writing “1” to this bit asserts the RESET signal to the IDE interface for 50 s. During asserting the XHRESET,
this bit reads “1”. If you reset it during the assertion, the XHRESET is output for 50 s from that time.
This register sets a transfer mode when accessing the register area of the IDE interface. It is enabled for an access
to 0x70 to 0x7F of the IDE-CS0/CS1 Register.
Decides the minimum value of the assert period of the strobe signal when accessing the register area of the IDE
interface. It is a value [Assert Pulse + 2] times the internal operation clock (50MHz) cycle.
Decides the minimum value of the negate period of the strobe signal when accessing the register area of the IDE
interface. It is a value [Assert Pulse + 2] times the internal operation clock (50MHz) cycle.
Example: 0000: 2 x 20ns = 40ns
IDE_RegAccCyc 7: Assert Pulse[3]
IDE_Config1
Register Name
0001: 3 x 20s = 60ns
6: Assert Pulse[2] R/W IDE Register Access Strobe Signal Assert Pulse
5: Assert Pulse[1]
4: Assert Pulse[0]
3: Negate Pulse[3]
2: Negate Pulse[2] R/W IDE Register Access Strobe Signal Negate Pulse
1: Negate Pulse[1]
0: Negate Pulse[0]
7: IDE_Reset
6:
5:
4:
3:
2:
1:
0:
Bit Symbol
Bit Symbol
R/W
R/W
R/W
Width Minimum Value
Width Minimum Value
EPSON
0: None
0:
0:
0:
0:
0:
0:
0:
Description
Description
1: IDE Reset
1:
1:
1:
1:
1:
1:
1:
H.Rst S.Rst B.Rst
H.Rst S.Rst B.Rst
0x00 0x00
0x00
0x00
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