peb20542 Infineon Technologies Corporation, peb20542 Datasheet - Page 179

• Manufacturer Part Number: peb20542
• Description: 2 Channel Serial Optimized Communication Controller With Dma
• Manufacturer: Infineon Technologies Corporation

Data Sheet
Register 27
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
PRE(7:0)
Bit
H
A
B
7
0
Preamble
This bit field determines the preamble pattern which is send out during
preamble transmission.
Note: In HDLC-mode, zero-bit insertion is disabled during preamble
PREAMB
Preamble Register
6
0
transmission.
read/write
00
Channel A
1E
written by CPU;
read and evaluated by SEROCCO-D
H
H
5
0
Channel B
6E
H
Preamble Pattern
5-179
4
0
PRE(7:0)
PRE(7:0)
3
0
Register Description (PREAMB)
2
0
(hdlc/bisync modes)
1
0
PEB 20542
PEF 20542
2000-09-14
0
0