peb20542 Infineon Technologies Corporation, peb20542 Datasheet - Page 208

• Manufacturer Part Number: peb20542
• Description: 2 Channel Serial Optimized Communication Controller With Dma
• Manufacturer: Infineon Technologies Corporation

Data Sheet
Register 63
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Register 64
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Bit
Bit
H
A
B
H
A
B
7
0
0
7
0
0
RAL2
Receive Address 2 Low Register
RAH2
Receive Address 2 High Register
6
0
0
6
0
0
read/write
00
Channel A
42
written by CPU;
read and evaluated by SEROCCO-D
read/write
00
Channel A
43
written by CPU;
read and evaluated by SEROCCO-D
H
H
H
H
5
0
0
5
0
0
Channel B
92
Channel B
93
Receive Address 2 (high)
Receive Address 2 (low)
H
H
5-208
4
0
0
4
0
0
RAH2
RAL2
3
0
0
3
0
0
Register Description (RAL2)
2
2
0
0
0
0
1
1
0
0
0
0
PEB 20542
PEF 20542
2000-09-14
0
0
0
0
0
0