peb20542 Infineon Technologies Corporation, peb20542 Datasheet - Page 79

• Manufacturer Part Number: peb20542
• Description: 2 Channel Serial Optimized Communication Controller With Dma
• Manufacturer: Infineon Technologies Corporation

Figure 34
Beyond this standard RTS function, signifying a transmission request of a frame
(Request To Send), in HDLC mode the RTS output may be programmed for a special
function via SOC1, SOC0 bits in the
channel is operating in a bus configuration mode in clock mode 0 or 1.
• If SOC1, SOC0 bits are set to ‘11’, the RTS output is active (= low) during the
• If SOC1, SOC0 bits are set to ‘10’, the RTS output function is disabled and the RTS
3.2.14.2 Carrier Detect (CD) Receiver Control
Similar to the RTS/CTS control for the transmitter, the SCC supports the carrier detect
modem control function for the serial receiver if the Carrier Detect Auto Start (CAS)
function is programmed by setting the ’CAS’ bit in register CCR1H. This function is
always available in clock modes 0, 2, 3, 6, 7 via the CD pin. In clock mode 1 the CD
function is not supported. See
If the CAS function is selected, the receiver is enabled and data reception is started when
the CD input is detected to be high. If CD input is set to ‘low’, reception of the current
character (byte) is still completed.
3.2.15
To provide fast and efficient testing, the SCC can be operated in a test mode by setting
the ’TLP’ bit in register CCR2L. The on-chip serial data input and output signals (TxD,
Data Sheet
reception of a frame.
pin remains always high.
Local Loop Test Mode
RTS
CTS
TxCLK
TxD
RTS/CTS Handshaking
Table 8
CCR1L
for an overview.
79
register. This is only available if the serial
Functional Overview
Sampling
ITT00244
PEB 20542
PEF 20542
2000-09-14