fin1108t Fairchild Semiconductor, fin1108t Datasheet
fin1108t
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fin1108t Summary of contents
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... In addition the FIN1108 can directly accept LVPECL, HSTL, and SSTL-2 for translation to LVDS. The FIN1108T has internal termination across the receiver inputs for reduced part count, reduced stub length and bet- ter noise immunity. See Applications section. Ordering Code: ...
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Pin Descriptions Pin Name Description Non-inverting LVDS Input IN1 IN2 IN3 IN4 IN5 IN6 IN7 IN8 Inverting LVDS Input IN1 IN2 ...
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Applications Signal Optimization via Internal Termination For LVDS signaling in point-to-point applications, receivers or repeaters with on-chip termination are preferable to reduce the overshoot or undershoot due to the reflection caused by stubs at receiver inputs rule of ...
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Absolute Maximum Ratings Supply Voltage ( LVDS DC Input Voltage ( LVDS DC Output Voltage (V ) OUT Driver Short Circuit Current (I ) Continuous 10 mA OSD Storage Temperature Range (T ) STG Max Junction ...
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AC Electrical Characteristics Over supply voltage and operating temperature ranges, unless otherwise specified Symbol Parameter t Differential Output Propagation Delay PLHD LOW-to-HIGH t Differential Output Propagation Delay PHLD HIGH-to-LOW t Differential Output Rise Time (20% to 80%) V TLHD t ...
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Note A: All LVTTL input pulses have frequency 10MHz, t Note B: C includes all probe and jig capacitances L FIGURE 5. Differential Driver Enable and Disable Circuit FIGURE 6. Enable and Disable AC Waveforms www.fairchildsemi.com FIGURE 4. AC Waveform ...
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Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to ...