fin1108t Fairchild Semiconductor, fin1108t Datasheet

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fin1108t

Manufacturer Part Number
fin1108t
Description
Lvds 8 Port High Speed Repeater
Manufacturer
Fairchild Semiconductor
Datasheet
© 2003 Fairchild Semiconductor Corporation
FIN1108MTD
FIN1108TMTD
(Preliminary)
FIN1108 • FIN1108T (Preliminary)
LVDS 8 Port High Speed Repeater
General Description
This 8 port repeater is designed for high speed intercon-
nects utilizing Low Voltage Differential Signaling (LVDS)
technology.
The FIN1108 accepts and outputs LVDS levels with a typi-
cal differential output swing of 330 mV which provides low
EMI at ultra low power dissipation even at high frequen-
cies. The FIN1108 provides a V
pling on the inputs. In addition the FIN1108 can directly
accept LVPECL, HSTL, and SSTL-2 for translation to
LVDS.
The FIN1108T has internal termination across the receiver
inputs for reduced part count, reduced stub length and bet-
ter noise immunity. See Applications section.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Order Number
Package Number
MTD48
MTD48
BB
reference for AC cou-
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
DS500655
Features
Greater than 800 Mbps data rate
3.3V power supply operation
3.5 ps maximum random jitter and 135 ps maximum
deterministic jitter
Wide rail-to-rail common mode range
LVDS receiver inputs accept LVPECL, HSTL, and
SSTL-2 directly
Ultra low power consumption
20 ps typical channel-to-channel skew
Power off protection
Meets or exceeds the TIA/EIA-644-A LVDS standard
Available in space saving 48-lead TSSOP package
Open circuit fail safe protection
V
FIN1108T (R
BB
7.5 kV HBM ESD Protection
reference output
Package Description
T
) features Internal Termination Resistors
March 2002
Revised May 2003
www.fairchildsemi.com

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fin1108t Summary of contents

Page 1

... In addition the FIN1108 can directly accept LVPECL, HSTL, and SSTL-2 for translation to LVDS. The FIN1108T has internal termination across the receiver inputs for reduced part count, reduced stub length and bet- ter noise immunity. See Applications section. Ordering Code: ...

Page 2

Pin Descriptions Pin Name Description Non-inverting LVDS Input IN1 IN2 IN3 IN4 IN5 IN6 IN7 IN8 Inverting LVDS Input IN1 IN2 ...

Page 3

Applications Signal Optimization via Internal Termination For LVDS signaling in point-to-point applications, receivers or repeaters with on-chip termination are preferable to reduce the overshoot or undershoot due to the reflection caused by stubs at receiver inputs rule of ...

Page 4

Absolute Maximum Ratings Supply Voltage ( LVDS DC Input Voltage ( LVDS DC Output Voltage (V ) OUT Driver Short Circuit Current (I ) Continuous 10 mA OSD Storage Temperature Range (T ) STG Max Junction ...

Page 5

AC Electrical Characteristics Over supply voltage and operating temperature ranges, unless otherwise specified Symbol Parameter t Differential Output Propagation Delay PLHD LOW-to-HIGH t Differential Output Propagation Delay PHLD HIGH-to-LOW t Differential Output Rise Time (20% to 80%) V TLHD t ...

Page 6

Note A: All LVTTL input pulses have frequency 10MHz, t Note B: C includes all probe and jig capacitances L FIGURE 5. Differential Driver Enable and Disable Circuit FIGURE 6. Enable and Disable AC Waveforms www.fairchildsemi.com FIGURE 4. AC Waveform ...

Page 7

Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to ...

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