74vcx163245 Fairchild Semiconductor, 74vcx163245 Datasheet
74vcx163245
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74vcx163245 Summary of contents
Page 1
... VCX163245 is designed so that the control pins (T are supplied The 74VCX163245 is suitable for mixed voltage applica- through a CCB tions such as notebook computers using a 1.8V CPU and 3.3V peripheral components fabricated with an Advanced CMOS technology to achieve high speed oper- ation while maintaining low CMOS power dissipation. ...
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... Connection Diagram Pin Assignment for TSSOP Logic Diagram ©2000 Fairchild Semiconductor Corporation 74VCX163245 Rev. 1.7 Pin Assignment for FBGA (Top Thru View) FBGA Pin Assignments T CCB GND GND ...
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... Second, the T/R n Logic Diagrams Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays. ©2000 Fairchild Semiconductor Corporation 74VCX163245 Rev. 1.7 Inputs OE Outputs 2 L –A ...
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... Free Air Operating Temperature Minimum Input Edge Rate, V Notes Absolute Maximum Rating must be observed Unused inputs or I/O pins must be held HIGH or LOW. They may not float. 6. Operation requires CCB ©2000 Fairchild Semiconductor Corporation 74VCX163245 Rev. 1.7 Parameter (4) ( (5) Parameter / 0.8V to 2.0V, V 3.0V ...
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... Quiescent Supply Current, CCA CCB per supply CCA CCB I Increase in I per Input T/R, OE Increase in I per Input ©2000 Fairchild Semiconductor Corporation 74VCX163245 Rev. 1.7 (1.65V < V 1.95V, 2.3V < V CCB V (V) V (V) Conditions CCB CCA 1.65–1.95 2.3–2.7 1.65–1.95 2.3–2.7 1.65–1.95 2.3–2.7 1.65– ...
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... Quiescent Supply Current, CCA CCB per supply CCA CCB I Increase in I per Input T/R, OE, Increase in I per Input ©2000 Fairchild Semiconductor Corporation 74VCX163245 Rev. 1.7 (1.65V < V 1.95V, 3.0V < V CCB V (V) V (V) Conditions CCB CCA 1.65–1.95 3.0–3.6 1.65–1.95 3.0–3.6 1.65–1.95 3.0–3.6 1.65– ...
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... I Quiescent Supply Current, CCA CCB per supply CCA CCB I Increase in I per Input T/R, OE Increase in I per Input ©2000 Fairchild Semiconductor Corporation 74VCX163245 Rev. 1.7 (2.3V < V 2.7V, 3.0V V CCB V (V) V (V) Conditions CCB CCA 2.3–2.7 3.0–3.6 2.3–2.7 3.0–3.6 2.3–2.7 3.0–3.6 2.3– ...
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... Valley Quiet Output Dynamic OHV Valley Quiet Output Dynamic OHV Valley ©2000 Fairchild Semiconductor Corporation 74VCX163245 Rev. 1.7 T –40°C to +85° 1.65V to 1.95V, V 1.65V to 1.95V, CCB CCB V 2.3V to 2.7V V 3.0V to 3.6V CCA CCA Min. ...
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... Figure 2. Waveform for Inverting and Non-inverting Functions t t 2.0 ns, 10 Figure 3. 3-STATE Output High Enable and Disable Times for Low Voltage Logic t t 2.0 ns, 10 ©2000 Fairchild Semiconductor Corporation 74VCX163245 Rev. 1.7 Conditions V 2.5V, V CCB CCA or V CCA/B V 2.5V, V CCB CCA or V CCA ...
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... Physical Dimensions Dimensions are in millimeters unless otherwise noted. Figure 5. 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide ©2000 Fairchild Semiconductor Corporation 74VCX163245 Rev. 1.7 Package Number BGA54A 10 www.fairchildsemi.com ...
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... Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 6. 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide ©2000 Fairchild Semiconductor Corporation 74VCX163245 Rev. 1.7 Package Number MTD48 11 www.fairchildsemi.com ...
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... Datasheet Identification Product Status Advance Information Formative or In Design Preliminary First Production No Identification Needed Full Production Obsolete Not In Production ©2000 Fairchild Semiconductor Corporation 74VCX163245 Rev. 1.7 i-Lo™ Power-SPM™ PowerTrench ImpliedDisconnect™ Programmable Active Droop™ IntelliMAX™ ® QFET ISOPLANAR™ QS™ ...