74vcx16722 Fairchild Semiconductor, 74vcx16722 Datasheet

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74vcx16722

Manufacturer Part Number
74vcx16722
Description
74vcx16722 Low Voltage 22-bit Register With 3.6v Tolerant Inputs And Outputs
Manufacturer
Fairchild Semiconductor
Datasheet

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74vcx16722MTDX
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© 2005 Fairchild Semiconductor Corporation
74VCX16722MTD
74VCX16722
Low Voltage 22-Bit Register
with 3.6V Tolerant Inputs and Outputs
General Description
The VCX16722 low voltage 22-bit register contains twenty-
two non-inverting D-type flip-flops with 3-STATE outputs
and is intended for bus oriented applications. The design
has been optimized for use with JEDEC compliant 200 pin
DIMM modules.
The 74VCX16722 is designed for low voltage (1.65V to
3.6V) V
The 74VCX16722 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Order Number
CC
applications with I/O capability up to 3.6V.
Package Number
MTD64
64-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
DS500192
Features
Note 1: To ensure the high-impedance state during power up or power
down, OE should be tied to V
value of the resistor is determined by the current sourcing capability of the
driver.
1.65V–3.6V V
3.6V tolerant inputs and outputs
t
Power-down high impedance inputs and outputs
Supports live insertion/withdrawal (Note 1)
Meets JEDEC registered module specifications
Static Drive (I
Latchup performance exceeds 300 mA
ESD performance:
PD
3.6ns max for 3.0V to 3.6V V
4.6ns max for 2.3V to 2.7V V
9.2ns max for 1.65V to 1.95V V
Human body model
Machine model 200V
24mA @ 3.0V
18mA @ 2.3V
6mA @ 1.65V
(CLK to O
Package Description
OH
n
CC
)
/I
supply operation
OL
)
CC
2000V
through a pull-up resistor; the minimum
February 1999
Revised January 2005
CC
CC
CC
www.fairchildsemi.com

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74vcx16722 Summary of contents

Page 1

... D-type flip-flops with 3-STATE outputs and is intended for bus oriented applications. The design has been optimized for use with JEDEC compliant 200 pin DIMM modules. The 74VCX16722 is designed for low voltage (1.65V to 3.6V) V applications with I/O capability up to 3.6V. CC The 74VCX16722 is fabricated with an advanced CMOS technology to achieve high speed operation while maintain- ing low CMOS power dissipation ...

Page 2

Connection Diagram Functional Description The VCX16722 contains twenty-two D-type flip-flops with 3-STATE standard outputs. The twenty-two flip-flops will store the state of their individual D-type inputs that meet the setup and hold time requirements on the LOW-HIGH Clock (CLK) transition, ...

Page 3

Absolute Maximum Ratings Supply Voltage ( Input Voltage ( Output Voltage ( Outputs 3-STATE Outputs Active (Note 3) DC Input Diode Current ( Output Diode Current (I ...

Page 4

DC Electrical Characteristics (2.3V Symbol Parameter V HIGH Level Input Voltage IH V LOW Level Input Voltage IL V HIGH Level Output Voltage OH V LOW Level Output Voltage OL I Input Leakage Current I I 3-STATE Output Leakage OZ ...

Page 5

AC Electrical Characteristics Symbol Parameter f Maximum Clock Frequency MAX Propagation Delay Clock to Bus PHL PLH Output Enable Time PZL PZH Output Disable Time PLZ PHZ t Setup Time S ...

Page 6

Capacitance Symbol Parameter C Input Capacitance IN C Input/Output Capacitance I/O C Power Dissipation Capacitance Characteristics OUT OUT FIGURE 1. Characteristics for Output - Pull Up Driver FIGURE 2. Characteristics for Output - Pull Down Driver ...

Page 7

AC Loading and Waveforms TEST PLH PHL PZL PLZ PZH PHZ FIGURE 4. Waveform for Inverting and Non-inverting Functions t t 2.0ns, 10 FIGURE 6. 3-STATE Output ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted 64-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the ...

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