sta339bw STMicroelectronics, sta339bw Datasheet - Page 29

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sta339bw

Manufacturer Part Number
sta339bw
Description
2.1-channel High-efficiency Digital Audio System
Manufacturer
STMicroelectronics
Datasheet

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STA339BW
6.1.5
6.2
6.2.1
condition. When TWARN is asserted (set to 0) for a period of time greater than 400 ms, the
power control block forces a -3 dB output limit (determined by TWOCL in the coefficient
RAM) to the modulation limit in an attempt to eliminate the thermal warning condition. Once
the thermal warning output limit adjustment is applied, it remains in this state until reset,
unless FDRB = 0.
Fault detect recovery bypass
Table 16.
The on-chip STA339BW power output block provides feedback to the digital controller using
inputs to the power control block. The FAULT input is used to indicate a fault condition (either
over-current or thermal). When FAULT is asserted (set to 0), the power control block
attempts a recovery from the fault by asserting the tri-state output (setting it to 0 which
directs the power output block to begin recovery), holds it at 0 for period of time in the range
of 0.1 ms to 1 second as defined by the fault-detect recovery constant register (FDRC
registers 0x2B-0x2C), then toggles it back to 1. This sequence is repeated as log as the fault
indication exists. This feature is enabled by default but can be bypassed by setting the
FDRB control bit to 1.
Configuration register B (addr 0x01)
Serial audio input interface format
Table 17.
7
0
1
2
3
Bit
Bit
C2IM
D7
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Fault detect recovery bypass
Serial audio input interface
C1IM
D6
0
0
0
0
0
0
RST
RST
FDRB
SAI0
SAI1
SAI2
SAI3
DSCKE
D5
0
Doc ID 15251 Rev 4
Name
Name
SAIFB
D4
0
0: fault detect recovery enabled
1: fault detect recovery disabled
Determines the interface format of the input serial
digital audio interface.
SAI3
D3
0
SAI2
Description
Description
D2
0
Register description
SAI1
D1
0
SAI0
D0
0
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