sta339bw STMicroelectronics, sta339bw Datasheet - Page 52

• Manufacturer Part Number: sta339bw
• Description: 2.1-channel High-efficiency Digital Audio System
• Manufacturer: STMicroelectronics

Register description
6.11.4
52/77
Limiter 2 attack/release threshold
The STA339BW includes two independent limiter blocks. The purpose of the limiters is to
automatically reduce the dynamic range of a recording to prevent the outputs from clipping
in anti-clipping mode or to actively reduce the dynamic range for a better listening
environment such as a night-time listening mode which is often needed for DVDs. The two
modes are selected via the DRC bit in
Each channel can be mapped to either limiter or not mapped, meaning that channel will clip
when 0 dBfs is exceeded. Each limiter looks at the present value of each channel that is
mapped to it, selects the maximum absolute value of all these channels, performs the
limiting algorithm on that value, and then if needed adjusts the gain of the mapped channels
in unison.
The limiter attack thresholds are determined by the LxAT registers if EATHx[7] bits are set
to 0 else the thresholds are determined by EATHx[6:0] . It is recommended in anti-clipping
mode to set this to 0 dBfs, which corresponds to the maximum unclipped output power of a
FFX amplifier. Since gain can be added digitally within the STA339BW it is possible to
exceed 0 dBfs or any other LxAT setting, when this occurs, the limiter, when active,
automatically starts reducing the gain. The rate at which the gain is reduced when the attack
threshold is exceeded is dependent upon the attack rate register setting for that limiter. Gain
reduction occurs on a peak-detect algorithm. Setting EATHx[7] bits to 1 selects the
anti-clipping mode.
The limiter release thresholds are determined by the LxRT registers if ERTHx[7] bits are set
to 0 else the thresholds are determined by ERTHx[6:0]. Settings to 1 ERTHx[7] bits the
anti-clipping mode is selected automatically. The release of limiter, when the gain is again
increased, is dependent on a RMS-detect algorithm. The output of the volume/limiter block
is passed through a RMS filter. The output of this filter is compared to the release threshold,
determined by the Release Threshold register. When the RMS filter output falls below the
release threshold, the gain is again increased at a rate dependent upon the Release Rate
register. The gain can never be increased past its set value and, therefore, the release only
occurs if the limiter has already reduced the gain. The release threshold value can be used
to set what is effectively a minimum dynamic range, this is helpful as over-limiting can
reduce the dynamic range to virtually zero and cause program material to sound “lifeless”.
In AC mode, the attack and release thresholds are set relative to full-scale. In DRC mode,
the attack threshold is set relative to the maximum volume setting of the channels mapped
to that limiter and the release threshold is set relative to the maximum volume setting plus
the attack threshold.
L2AT3
D7
0
L2AT2
D6
1
L2AT1
D5
1
Doc ID 15251 Rev 4
L2AT0
Configuration register E (addr 0x04) on page
D4
0
L2RT3
D3
1
L2RT2
D2
0
L2RT1
D1
0
STA339BW
L2RT0
36.
D0
1