74ac10scx-nl Fairchild Semiconductor, 74ac10scx-nl Datasheet
74ac10scx-nl
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74ac10scx-nl Summary of contents
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... Inputs Outputs n ©1988 Fairchild Semiconductor Corporation 74AC10, 74ACT10 Rev. 1.6 General Description The AC/ACT10 contains three, 3-input NAND gates. Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" ...
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... Output Voltage O T Operating Temperature A ∆ ∆ t Minimum Input Edge Rate, AC Devices: V from 30 ∆ ∆ t Minimum Input Edge Rate, ACT Devices: V from 0.8V to 2.0V ©1988 Fairchild Semiconductor Corporation 74AC10, 74ACT10 Rev. 1.6 Parameter Parameter , V @ 3.3V, 4.5V, 5. 4.5V, 5. Rating –0.5V to +7.0V –20mA +20mA – ...
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... All outputs loaded; thresholds on input associated with output under test. 3. Maximum test duration 2.0ms, one output loaded at a time and I @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5. ©1988 Fairchild Semiconductor Corporation 74AC10, 74ACT10 Rev. 1.6 = +25° ...
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... Minimum Dynamic OLD (6) Output Current I OHD I Maximum Quiescent CC Supply Current Notes: 5. All outputs loaded; thresholds on input associated with output under test. 6. Maximum test duration 2.0ms, one output loaded at a time. ©1988 Fairchild Semiconductor Corporation 74AC10, 74ACT10 Rev. 1.6 = +25° (V) Conditions Typ. = 0. ...
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... Voltage range 3.3 is 3.3V ± 0.3V. Voltage range 5.0 is 5.0V ± 0.5V. AC Electrical Characteristics for ACT Symbol Parameter t Propagation Delay PLH t Propagation Delay PHL Note: 8. Voltage Range 5.0 is 5.0V ± 0.5V. Capacitance Symbol Parameter C Input Capacitance IN C Power Dissipation Capacitance PD ©1988 Fairchild Semiconductor Corporation 74AC10, 74ACT10 Rev. 1.6 = +25° 50pF C L (7) V (V) Min. Typ. Max. CC 3.3 1.5 6.0 9.5 5.0 1.5 4 ...
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... Physical Dimensions Dimensions are in inches (millimeters) unless otherwise noted. Figure 1. 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow ©1988 Fairchild Semiconductor Corporation 74AC10, 74ACT10 Rev. 1.6 Package Number M14A 6 www.fairchildsemi.com ...
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... Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 2. 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide ©1988 Fairchild Semiconductor Corporation 74AC10, 74ACT10 Rev. 1.6 Package Number M14D 7 www.fairchildsemi.com ...
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... Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 3. 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide ©1988 Fairchild Semiconductor Corporation 74AC10, 74ACT10 Rev. 1.6 Package Number MTC14 8 www.fairchildsemi.com ...
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... Physical Dimensions (Continued) Dimensions are in inches (millimeters) unless otherwise noted. Figure 4. 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide ©1988 Fairchild Semiconductor Corporation 74AC10, 74ACT10 Rev. 1.6 Package Number N14A 9 www.fairchildsemi.com ...
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... TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ® ACEx Across the board. Around the world. ActiveArray Bottomless Build it Now CoolFET CROSSVOLT CTL™ Current Transfer Logic™ ...