dm74ls125asj Fairchild Semiconductor, dm74ls125asj Datasheet

dm74ls125asj

Manufacturer Part Number

dm74ls125asj

Description

Quad 3-state Buffer

Manufacturer

Fairchild Semiconductor

Datasheet

1.DM74LS125ASJ.pdf (5 pages)

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DM74LS125AM

DM74LS125ASJ

DM74LS125AN

DM74LS125A

Quad 3-STATE Buffer

General Description

This device contains four independent gates each of which

performs a non-inverting buffer function. The outputs have

the 3-STATE feature. When enabled, the outputs exhibit

the low impedance characteristics of a standard LS output

with additional drive capability to permit the driving of bus

lines without external resistors. When disabled, both the

output transistors are turned off presenting a high-imped-

ance state to the bus line. Thus the output will act neither

as a significant load nor as a driver. To minimize the possi-

bility that two outputs will attempt to take a common bus to

opposite logic levels, the disable time is shorter than the

enable time of the outputs.

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Order Number

Package Number

M14A

M14D

N14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

DS006387

Function Table

Hi-Z

LOW Logic Level

Either LOW or HIGH Logic Level

HIGH Logic Level

3-STATE (Outputs are disabled)

Package Description

Inputs

August 1986

Revised March 2000

www.fairchildsemi.com

Output

Hi-Z

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dm74ls125asj Summary of contents

Page 1

... Ordering Code: Order Number Package Number DM74LS125AM M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow DM74LS125ASJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide DM74LS125AN N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “ ...

Page 2

Absolute Maximum Ratings Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range Recommended Operating Conditions Symbol Parameter V Supply Voltage CC V HIGH Level Input Voltage IH V LOW Level Input Voltage IL I HIGH Level Output ...

Page 3

Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow Package Number M14A 3 www.fairchildsemi.com ...

Page 4

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M14D 4 ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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