DM74ALS273SJX Fairchild Semiconductor, DM74ALS273SJX Datasheet

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DM74ALS273SJX

Manufacturer Part Number
DM74ALS273SJX
Description
IC FLIP FLOP OCT D POS 20SOP
Manufacturer
Fairchild Semiconductor
Series
74ALSr
Type
D-Type Busr
Datasheet

Specifications of DM74ALS273SJX

Function
Master Reset
Output Type
Non-Inverted
Number Of Elements
1
Number Of Bits Per Element
8
Frequency - Clock
35MHz
Delay Time - Propagation
2ns
Trigger Type
Positive Edge
Current - Output High, Low
2.6mA, 24mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (5.3mm Width), 20-SO, 20-SOEIAJ
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
© 2000 Fairchild Semiconductor Corporation
DM74ALS273WM
DM74ALS273SJ
DM74ALS273MSA
DM74ALS273N
DM74ALS273
Octal D-Type Edge-Triggered Flip-Flop with Clear
General Description
These monolithic, positive-edge-triggered flip-flops utilize
TTL circuitry to implement D-type flip-flop logic with a direct
clear input.
Information at the D inputs meeting the setup requirements
is transferred to the Q outputs on the positive-going edge
of the clock pulse. Clock triggering occurs at a particular
voltage level and is not directly related to the transition time
of the positive-going pulse. When the clock input is at
either the HIGH or LOW level, the D input signal has no
effect at the output.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Order Number
Package Number
MSA20
M20B
M20D
N20A
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
DS006216
Features
Switching specifications at 50 pF
Switching specifications guaranteed over full tempera-
ture and V
Buffer-type outputs and improved AC offer significant
advantage over DM74LS273.
Advanced oxide-isolated, ion-implanted Schottky TTL
process
Functionally
DM74LS273.
Package Description
CC
range
and
pin-for-pin
April 1984
Revised February 2000
www.fairchildsemi.com
compatible
with

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DM74ALS273SJX Summary of contents

Page 1

... Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram © 2000 Fairchild Semiconductor Corporation Features Switching specifications Switching specifications guaranteed over full tempera- ...

Page 2

Function Table (Each Flip-Flop) Inputs Clear Clock LOW State H HIGH State X Don’t Care Positive Edge Transition Q Previous Condition www.fairchildsemi.com Logic Diagram Output ...

Page 3

Absolute Maximum Ratings Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range Typical JA N Package M Package Recommended Operating Conditions Symbol Parameter V Supply Voltage CC V HIGH Level Input Voltage IH V LOW Level Input ...

Page 4

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide www.fairchildsemi.com Package Number M20B 4 ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number MSA20 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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