m36w832te STMicroelectronics, m36w832te Datasheet - Page 17

• Manufacturer Part Number: m36w832te
• Description: 32 Mbit 2mb X16, Boot Block Flash Memory And 8 Mbit 512kb X16 Sram, Multiple Memory Product
• Manufacturer: STMicroelectronics

Read Array, Read Status Register, Read Electron-
ic Signature and Read CFI Query commands. Ad-
ditionally, if the suspend operation was Erase then
the Program, Double Word Program, Quadruple
Word Program, Block Lock, Block Lock-Down or
Protection Program commands will also be ac-
cepted. The block being erased may be protected
by issuing the Block Protect, Block Lock or Protec-
tion Program commands. When the Program/
Erase Resume command is issued the operation
will complete. Only the blocks not being erased
may be read or programmed correctly.
During a Program/Erase Suspend, the device can
be placed in a pseudo-standby mode by taking
Chip Enable to V
Reset turns to V
See Appendix C, Figure 29, Program or Double
Word Program Suspend & Resume Flowchart and
Pseudo Code, and Figure 31, Erase Suspend &
Resume Flowchart and Pseudo Code for flow-
charts for using the Program/Erase Suspend com-
mand.
Program/Erase Resume Command. The
gram/Erase Resume command can be used to re-
start the Program/Erase Controller after a
Program/Erase Suspend operation has paused it.
One Bus Write cycle is required to issue the com-
mand. Once the command is issued subsequent
Bus Read operations read the Status Register.
See Appendix C, Figure 29, Program or Double
Word Program Suspend & Resume Flowchart and
Pseudo Code, and Figure 31, Erase Suspend &
Resume Flowchart and Pseudo Code for flow-
charts for using the Program/Erase Resume com-
mand.
Protection Register Program Command. The
Protection Register Program command is used to
Program the 128 bit user One-Time-Programma-
ble (OTP) segment of the Protection Register. The
segment is programmed 16 bits at a time. When
shipped all bits in the segment are set to ‘1’. The
user can only program the bits to ‘0’.
Two write cycles are required to issue the Protec-
tion Register Program command.
Read operations output the Status Register con-
tent after the programming has started.
The segment can be protected by programming bit
1 of the Protection Lock Register (see Figure 6,
Flash Security Block and Protection Register
Memory Map). Attempting to program a previously
protected Protection Register will result in a Status
The first bus cycle sets up the Protection
Register Program command.
The second latches the Address and the Data to
be written to the Protection Register and starts
the Program/Erase Controller.
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.
IH
. Program/Erase is aborted if
Pro-
Register error. The protection of the Protection
Register is not reversible.
The Protection Register Program cannot be sus-
pended.
Block Lock Command. The Block Lock com-
mand is used to lock a block and prevent Program
or Erase operations from changing the data in it.
All blocks are locked at power-up or reset.
Two Bus Write cycles are required to issue the
Block Lock command.
The lock status can be monitored for each block
using the Read Electronic Signature command.
Table. 10 shows the protection status after issuing
a Block Lock command.
The Block Lock bits are volatile, once set they re-
main set until a hardware reset or power-down/
power-up. They are cleared by a Blocks Unlock
command. Refer to the section, Block Locking, for
a detailed explanation.
Block Unlock Command. The Blocks Unlock
command is used to unlock a block, allowing the
block to be programmed or erased. Two Bus Write
cycles are required to issue the Blocks Unlock
command.
The lock status can be monitored for each block
using the Read Electronic Signature command.
Table. 10 shows the protection status after issuing
a Block Unlock command. Refer to the “Flash
Block Locking” section, for a detailed explanation.
Block Lock-Down Command. A locked block
cannot be Programmed or Erased, or have its pro-
tection status changed when WPF is low, V
When WPF is high, V
disabled and the locked blocks can be individually
unlocked by the Block Unlock command.
Two Bus Write cycles are required to issue the
Block Lock-Down command.
The lock status can be monitored for each block
using the Read Electronic Signature command.
Locked-Down blocks revert to the locked (and not
locked-down) state when the device is reset on
power-down. Table. 10 shows the protection sta-
tus after issuing a Block Lock-Down command.
The first bus cycle sets up the Block Lock
command.
The second Bus Write cycle latches the block
address.
The first bus cycle sets up the Block Unlock
command.
The second Bus Write cycle latches the block
address.
The first bus cycle sets up the Block Lock
command.
The second Bus Write cycle latches the block
address.
M36W832TE, M36W832BE
IH,
the Lock-Down function is
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