ilc6383 Fairchild Semiconductor, ilc6383 Datasheet - Page 7

• Manufacturer Part Number: ilc6383
• Description: 1-cell To 3-cell Boost Dc-dc Converter With True Load Disconnect, 3.3v, 5v Or Adjustable Output
• Manufacturer: Fairchild Semiconductor

PRODUCT SPECIFICATION
The Dual PWM/PFM mode architecture was designed spe-
cifically for applications such as wireless communications,
which need the spectral predictability of a PWM-type DC-
DC converter, yet also need the highest efficiencies possible,
especially in Standby mode.
Other Considerations
The other limitation of PWM techniques is that, while the
fundamental switching frequency is easier to filter out since
it's constant, the higher order harmonics of PWM will be
present and may have to be filtered out, as well. Any filtering
requirements, though, will vary by application and by actual
system design and layout, so generalizations in this area are
difficult, at best.
However, PWM control for boost DC-DC conversion is
widely used, especially in audio-noise sensitive applications
or applications requiring strict filtering of the high frequency
components.
Low Battery Detector
The ILC6383's low battery detector is a based on a CMOS
comparator. The negative input of the comparator is tied to
an internal 1.25V (nominal) reference, V
input is the LBI/SD pin. It uses a simple potential divider
arrangement with two resistors to set the LBI threshold as
shown in Figure 6. The input bias current of the LBI pin is
only 200nA. This means that the resistor values R1 and R2
can be set quite high. The formula for setting the LBI thresh-
old is:
V
Since the LBI input current is negligible (<200nA), this
equation is derived by applying voltage divider formula
across R6. A typical value for R6 is 100kΩ.
R5 = 100kΩ x [(V
The LBI detector has a built in delay of 120ms. In order to
get a valid low-battery-output (LBO) signal, the input volt-
age must be lower than the low-battery-input (LBI) threshold
for a duration greater than the low battery hold time
(t
ing due to voltage transients at the battery terminal caused by
high frequency switching currents.
REV. 1.2.6 6/13/02
hold(LBI)
LBI
= V
REF
) of 120msec. This feature eliminates false trigger-
x (1+R5/R6)
LBI
/V
REF
) -1], where V
REF
REF
= 1.25V (nom.)
. The positive
The output of the low battery detector is an open drain
capable of sinking 2mA. A 10kΩ pull-up resistor is recom-
mended on this output.
For V
The low battery detector can also be configured for
voltages <1.25V by bootstrapping the LBI input from V
The circuitry for this is shown in Figure 7.
The following equation is used when V
1.25V:
R1 = R2 x [(V
where V
This equation can also be derived using voltage divider
formula across R2. A typical value for R2 is 100kΩ.
LBI
REF
V
IN
R5
R6
< 1.25V
= 1.25V (nom.)
Figure 6. Low Battery Detector
R1
REF
LBI/SD
- V
Figure 7. V
LBI/SD
R2
3
IN
7
) / (V
GND
3
2 V
1.25V
Internal
Reference
+
7
-
IN
OUT
GND
LBI
Shutdown
1.25V
Internal
Reference
+
-
< 1.25V
- V
DELAY
100ms
REF
IN
ILC6383
ILC6383
)],
is lower than
6
LBO
V
R
8
OUT
PU
3.3V
ILC6383
OUT
7
.