r4f2426 Renesas Electronics Corporation., r4f2426 Datasheet - Page 886

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r4f2426

Manufacturer Part Number
r4f2426
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Section 15 Serial Communication Interface (SCI, IrDA)
15.3.8
SCMR selects Smart Card interface mode and its format.
Rev. 1.00 Sep. 19, 2008 Page 858 of 1270
REJ09B0466-0100
Bit
7
6 to 4
3
2
1
0
Bit Name
BCP2
SDIR
SINV
SMIF
Smart Card Mode Register (SCMR)
0
Initial Value
1
All 1
0
0
1
R/W
R/W
R/W
R/W
R/W
Smart Card Interface Mode Select
Description
Basic Clock Pulse 2
Selects, in combination with the BCP1 and BCP0
bits in SMR, the number of basic clock cycles in a
1-bit transfer interval in Smart Card interface
mode.
For the settings, refer to section 15.3.5, Serial
Mode Register (SMR).
Reserved
These bits are always read as 1.
Smart Card Data Transfer Direction
Selects the serial/parallel conversion format.
0: LSB-first in transfer
1: MSB-first in transfer
The bit setting is valid only when the transfer data
format is 8 bits. For 7-bit data, LSB-first is fixed.
Smart Card Data Invert
Specifies inversion of the data logic level. The
SINV bit does not affect the logic level of the parity
bit. To invert the parity bit, invert the O/E bit in
SMR.
0: TDR contents are transmitted as they are.
1: TDR contents are inverted before being
Reserved
This bit is always read as 1.
This bit is set to 1 to make the SCI operate in
Smart Card interface mode.
0: Normal asynchronous mode or clocked
1: Smart Card interface mode
Receive data is stored as it is in RDR.
transmitted. Receive data is stored in inverted
form in RDR.
synchronous mode

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