isppac-powr1220at8 Lattice Semiconductor Corp., isppac-powr1220at8 Datasheet - Page 27

• Manufacturer Part Number: isppac-powr1220at8
• Description: In-system Programmable Power Supply Monitoring, Sequencing And Margining Controller
• Manufacturer: Lattice Semiconductor Corp.

Lattice Semiconductor
Figure 1-17. Voltage Profile Control
TrimCell Architecture
The TrimCell block diagram is shown in Figure 1-18. The 8-bit DAC at the output provides the trimming voltage
required to set the output voltage of a programmable supply. Each TrimCell can be operated in any one of the four
voltage profiles. In each voltage profile the output trimming voltage can be set to a preset value. There are six 8-bit
registers in each TrimCell that, depending on the operational mode, set the DAC value. Of these, four DAC values
(DAC Register 0 to DAC Register 3) are stored in the E
stored in volatile registers. Two multiplexers (Mode Mux and Profile Mux) control the routing of the code to the DAC.
The Profile Mux can be controlled by common TrimCell voltage profile control signals.
PLD Control Signals
VPS0
VPS1
PLD_VPS[0:1]
2
2
(E
INT/EXT
SELECT
2
CMOS)
1-27
2
2
CMOS memory while the remaining register contents are
ispPAC-POWR1220AT8
Margin/Trim Block
ispPAC-POWR1220AT8 Data Sheet
TrimCell
TrimCell
TrimCell
TrimCell
TrimCell
TrimCell
TrimCell
TrimCell
#1
#2
#3
#4
#5
#6
#7
#8
Trim 1
Trim 2
Trim 3
Trim 4
Trim 5
Trim 6
Trim 7
Trim 8