isppac-powr1220at8 Lattice Semiconductor Corp., isppac-powr1220at8 Datasheet - Page 28

• Manufacturer Part Number: isppac-powr1220at8
• Description: In-system Programmable Power Supply Monitoring, Sequencing And Margining Controller
• Manufacturer: Lattice Semiconductor Corp.

Lattice Semiconductor
Figure 1-18. ispPAC-POWR1220AT8 Output TrimCell
Figure 1-15 shows four power supply voltages next to each DC-DC converter. When the Profile MUX is set to Volt-
age Profile 3, the DC supply controlled by Trim 1 will be at 0.95V, the DC supply controlled by Trim 2 will be at
1.14V, 1.43V for Trim 3 and 3.14V for Trim 8. When Voltage Profile 0 is selected, Trim 1 will set the supply to 1V,
Trim 2 and Trim 3 will be set by the values that have been loaded using I
3.3V.
The following table summarizes the voltage profile selection and the corresponding DAC output trimming voltage.
The voltage profile selection is common to all eight TrimCells.
Table 1-6. TrimCell Voltage Profile and Operating Modes
TrimCell Operation in Voltage Profiles 1, 2 and 3: The output trimming voltage is determined by the code stored
in the DAC Registers 1, 2, and 3 corresponding to the selected Voltage Profile.
TrimCell Operation in Voltage Profile 0: The Voltage Profile 0 has three operating modes. They are DAC Register
0 Select mode, DAC Register I
E
during Voltage Profile 0 mode of operation.
DAC Register 0 Select Mode: The contents of DAC register 0 are stored in the on-chip E
Voltage Profile 0 is selected, the DAC will be loaded with the value stored in DAC Register 0.
2
CMOS configuration memory. Each of the eight TrimCells can be independently set to different operating modes
PLD_VPS[1:0]
or VPS[1:0]
11
10
01
00
PROFILE 3
PROFILE 2
PROFILE 1
PROFILE 0
VOLTAGE
VOLTAGE
VOLTAGE
VOLTAGE
Voltage Profile 3
Voltage Profile 2
Voltage Profile 1
Voltage Profile 0
Selected Voltage Profile
FROM CLOSED LOOP
DAC REGISTER 3
DAC REGISTER 2
DAC REGISTER 1
DAC REGISTER 0
TRIM REGISTER
DAC REGISTER
CLOSED LOOP
TRIM CIRCUIT
(E
(E
(E
(E
2
2
2
2
CMOS)
CMOS)
CMOS)
CMOS)
(I
2
C)
2
C Select mode and Closed Loop Trim mode. The mode selection is stored in the
TRIMCELL ARCHITECTURE
8
8
8
VOLTAGE PROFILE 0
8
MODE SELECT
8
8
(E2CMOS)
Digital Closed Loop Trim
DAC Register I
DAC Register 0 Select
1-28
Selected Mode
8
VOLTAGE PROFILE
COMMON TrimCell
—
—
—
11
10
01
00
CONTROL
2
C Select
2
ispPAC-POWR1220AT8 Data Sheet
2
C at 1.2 and 1.5V, and Trim 8 will be set to
8
DAC
DAC Register 3 (E
DAC Register 2 (E
DAC Register 1 (E
DAC Register 0 (E
Closed Loop Trim Register
DAC Register (I
Trimming Voltage
is Controlled by
2
CMOS memory. When
TRIMx
2
2
2
2
CMOS)
CMOS)
CMOS)
CMOS)
2
C)