kh561 Fairchild Semiconductor, kh561 Datasheet - Page 9

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kh561

Manufacturer Part Number
kh561
Description
Wideband, Low Distortion Driver Amplifier
Manufacturer
Fairchild Semiconductor
Datasheet
KH561
REV. 1A February 2001
With this total value derived, the required external C
developed by backing out the effect of the internal 10pF.
This, and an expression for the external C
intermediate steps are shown below.
The plot in Figure 6 shows the required C
several desired output impedances using the equations
shown above. Note that for lower R
large. But, since the total compensation is actually the
series combination of C
C
is only slightly changed. This, in part, sets the lower
limits on allowable R
A 0% small signal overshoot response can be achieved
by increasing C
Note that this applies only for small signals due to slew
rate effects coming into play for large, fast edge rates.
Beyond the nominal compensation values developed
thus far, this external C
for tailoring the frequency response under a wide variety
of gain and loading conditions. It is oftentimes useful to
use a small adjustable cap in development to determine
a C
production. An excellent 5pF to 20pF trimmer cap for this
is a Sprague-Goodman part #GKX20000.
When the KH561 is used to drive a capacitive load, such
as an ADC or SAW device, the load will act to compen-
sate the response along with C
lower C
ment would indicate. This is advantageous in that a low
R
without the compensating effect of load itself, would
otherwise require very large C
C
C
or
Figure 6: External Compensation Capacitance (C
x
o
x
x
’s is increasingly ineffective as the total compensation
=
=
x
would be desired to drive a capacitive load which,
suitable to the application, then fixing that value for
10 C
300 1
10 C
x
values are required than the earlier develop-
R
20
18
16
14
12
10
t
8
6
4
2
0
t
o
5
R
1
2
g
10
x
slightly from the maximally flat value.
R
o
15
= 50Ω
o
0.08
No Load Voltage Gain
.
20
R
x
o
x
= 75Ω
provides a very flexible means
pF
25
and 10pF, going to very high
R
Maximally Flat Response
o
30
= 100Ω
into a Matched Load
x
x
. Generally, considerably
values.
35
40
o
’s, C
45
50
x
x
x
can get very
vs. gain for
55
without the
x
x
)
is
Gain and Output Impedance Range
Figure 7 shows a plot of the recommended gain and
output impedances for the KH561. Operation outside of
this region is certainly possible with some degradation in
performance. Several factors contribute to set this range.
At very low output impedances, the required value of
feedback resistor becomes so low as to excessively load
the output causing a rapid degradation in distortion.
The maximum R
This allows the KH561 to drive into a 2:1 step down
transformer matching to a 50Ω load. (This offers
some advantages from a distortion standpoint. See Kota
Application Note KAN-01 for details.)
For a given R
been set to keep the equivalent input noise voltage less
than 4nV/√Hz. Generally, the equivalent input noise volt-
age decreases with higher signal gains. The high gain
limit has been set by targeting a minimum R
minimum R
Amplifier Configurations
The KH561 is intended for a fixed, non-inverting, gain
configuration as shown in Figure 1. The KH560 offers the
better pulse fidelity with its improved thermal tail in the
pulse response (vs. the KH561).
internal forward gain, the inverting node does not present
a low impedance, or virtual ground, node. Hence, in an
inverting configuration, the signal’s source impedance
will see a finite load whose value depends on the output
loading. Inverting mode operation can be best achieved
using a wideband, unity gain buffer with low output
impedance, to isolate the source from this varying load.
A DC level can, however, be summed into the inverting
node to offset the output either for offset correction
or signal conditioning.
Accuracy Calculations
Several factors contribute to limit the achievable KH561
accuracy. These include the DC errors, noise effects, and
the impact internal amplifier characteristics have on the
signal gain. Both the output DC error and noise model
may be developed using the equivalent model of Figure
5. Generally, non-inverting input errors show up at the
100
90
80
70
60
50
40
30
20
10
Figure 7: Recommended Gain and
0
f
0
of 100Ω.
o
Output Impedance Range
, the minimum gain shown in Figure 7 has
20
o
was set somewhat arbitrarily at 200Ω.
40
Output Impedance (Ω)
60
80 100 120 140 160 180 200
Low R
High Noise Region
f
or R
Recommended
Region
g
Region
Due to its low
g
DATA SHEET
of 10Ω or a
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