74LCX240SJ Fairchild Semiconductor, 74LCX240SJ Datasheet

IC INVERTER DUAL 4-INPUT 20SOP

74LCX240SJ

Manufacturer Part Number
74LCX240SJ
Description
IC INVERTER DUAL 4-INPUT 20SOP
Manufacturer
Fairchild Semiconductor
Series
74LCXr
Datasheet

Specifications of 74LCX240SJ

Logic Type
Inverter
Number Of Inputs
4
Number Of Circuits
2
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-SOP
Logic Family
LCX
Number Of Channels Per Chip
8
Polarity
Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
8 / 8
Output Type
3-State
Propagation Delay Time
7.5 ns at 2.7 V, 6.5 ns at 3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74LCX240SJX
Manufacturer:
MOT
Quantity:
2 500
©1994 Fairchild Semiconductor Corporation
74LCX240 Rev. 1.6.0
74LCX240
Low Voltage Octal Buffer/Line Driver with 5V Tolerant
Inputs and Outputs
Features
Note:
1. To ensure the high-impedance state during power up
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
74LCX240WM
74LCX240SJ
74LCX240MSA
74LCX240MTC
5V tolerant inputs and outputs
2.3V–3.6V V
6.5ns t
Power-down high impedance inputs and outputs
Supports live insertion/withdrawal
±24mA output drive (V
Implements patented noise/EMI reduction circuitry
Latch-up performance exceeds 500mA
ESD performance:
– Human body model
– Machine model
or down, OE should be tied to V
resistor: the minimum value or the resistor is
determined by the current-sourcing capability of the
driver.
Number
All packages are lead free per JEDEC: J-STD-020B standard.
Order
PD
max. (V
CC
specifications provided
CC
Package
Number
MSA20
MTC20
200V
M20B
M20D
CC
3.3V), 10µA I
2000V
3.0V)
CC
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
(1)
through a pull-up
CC
max.
General Description
The LCX240 is an inverting octal buffer and line driver
designed to be employed as a memory address driver,
clock driver and bus oriented transmitter or receiver. The
device is designed for low voltage (2.5V or 3.3V) V
applications with capability of interfacing to a 5V signal
environment.
The LCX240 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
Package Description
January 2008
www.fairchildsemi.com
CC

Related parts for 74LCX240SJ

74LCX240SJ Summary of contents

Page 1

... Ordering Information Order Package Number Number 74LCX240WM M20B 74LCX240SJ M20D 74LCX240MSA MSA20 74LCX240MTC MTC20 Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. ©1994 Fairchild Semiconductor Corporation 74LCX240 Rev ...

Page 2

... Connection Diagram Pin Description Pin Names Description 3-STATE Output Enable Inputs –I Inputs –O Outputs 0 7 ©1994 Fairchild Semiconductor Corporation 74LCX240 Rev. 1.6.0 Logic Diagram Truth Tables Inputs OE I (Pins 12, 14, 16, 18 Inputs OE I (Pins HIGH Voltage Level L LOW Voltage Level ...

Page 3

... CC V 2.7V–3. 2.3V–2. Free-Air Operating Temperature Input Edge Rate, V Note: 3. Unused inputs must be held HIGH or LOW. They may not float. ©1994 Fairchild Semiconductor Corporation 74LCX240 Rev. 1.6.0 Parameter (2) GND I (3) Parameter 0.8V–2.0V Rating –0.5V to +7.0V –0.5V to +7.0V – ...

Page 4

... Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to- LOW ( LOW-to-HIGH (t OSHL ©1994 Fairchild Semiconductor Corporation 74LCX240 Rev. 1.6.0 V (V) Conditions CC 2.3– ...

Page 5

... Dynamic Switching Characteristics Symbol Parameter V Quiet Output Dynamic Peak V OLP V Quiet Output Dynamic Valley V OLV Capacitance Symbol Parameter C Input Capacitance IN C Output Capacitance OUT C Power Dissipation Capacitance PD ©1994 Fairchild Semiconductor Corporation 74LCX240 Rev. 1.6.0 V (V) Conditions CC 3.3 C 50pF, V 3.3V 2.5 C 30pF, V 2.5V 3.3 C 50pF ...

Page 6

... Waveform for Inverting and Non-Inverting Functions Propagation Delay. Pulse Width and t 3-STATE Output Low Enable and Disable Times for Logic Figure 2. Waveforms (Input Characteristics 1MHz, t ©1994 Fairchild Semiconductor Corporation 74LCX240 Rev. 1.6.0 (Generic for LCX Family) includes probe and jig capacitance) L ...

Page 7

... Schematic Diagram (Generic for LCX Family) ©1994 Fairchild Semiconductor Corporation 74LCX240 Rev. 1.6.0 7 www.fairchildsemi.com ...

Page 8

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 9

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 10

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 11

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 12

... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. ® ACEx Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...

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