ql6325-4pt280c QuickLogic Corp, ql6325-4pt280c Datasheet - Page 23

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ql6325-4pt280c

Manufacturer Part Number
ql6325-4pt280c
Description
Combining Performance, Density, And Embedded Ram
Manufacturer
QuickLogic Corp
Datasheet
© 2007 QuickLogic Corporation
Clock Segment
t
t
PGCK
BGCK
Programmable Clock
External Clock
Global clock pin delay to quad net
Global clock buffer delay (quad net to flip flop)
Figure 21: Global Clock Structure Schematic
Table 14: Eclipse Global Clock Tree Delays
Figure 20: Eclipse Global Clock Structure
t
PGCK
Parameter
Clock
Select
Global Clock Buffer
t
BGCK
Max. Rise
0.990 ns
0.534 ns
Eclipse Family Data Sheet Rev. F
Global Clock
Quad net
Value
www.quicklogic.com
Max. Fall
1.386 ns
1.865 ns
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