ql6325-4pt280c QuickLogic Corp, ql6325-4pt280c Datasheet - Page 5

• Manufacturer Part Number: ql6325-4pt280c
• Description: Combining Performance, Density, And Embedded Ram
• Manufacturer: QuickLogic Corp

The Write Enable (WE) line acts as a clock enable for synchronous write operation. The Read Enable (RE) acts
as a clock enable for synchronous READ operation (ASYNCRD input low), or as a flow-through enable for
asynchronous READ operation (ASYNCRD input high).
Designers can cascade multiple RAM modules to increase the depth or width allowed in single modules by
connecting corresponding address lines together and dividing the words between modules.
A similar technique can be used to create depths greater than 512 words. In this case address signals higher
than the ninth bit are encoded onto the write enable (WE) input for WRITE operations. The READ data outputs
are multiplexed together using encoded higher READ address bits for the multiplexer SELECT signals.
The RAM blocks can be loaded with data generated internally (typically for RAM or FIFO functions) or with
data from an external PROM (typically for ROM functions).
Phase Locked Loops (PLLs)
Instead of requiring extra components, designers simply need to instantiate one of the pre-configured models
described in this section and listed in
frequencies than many other PLLs. Also, QuickLogic PLLs can be cascaded to support different ranges of
frequency multiplications or divisions, driving the device at a faster or slower rate than the incoming clock
frequency. Most importantly, they achieve a very short clock-to-out time—generally less than 3 ns. This low
clock-to-out time is achieved by the PLL subtracting the clock tree delay through the feedback path, effectively
making the clock tree delay zero.
Figure 5
© 2007 QuickLogic Corporation
illustrates a typical QuickLogic ESP PLL.
FOUT
FIN
Frequency Divide
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1 . . _
2 .
4 .
Table
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4. The QuickLogic built-in PLLs support a wider range of
Figure 5: PLL Block
Frequency Multiply
1 . _ .
4 . _ .
2 . _ .
Filter
PLL Bypass
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Eclipse Family Data Sheet Rev. F
1st Quadrant
2nd Quadrant
3rd Quadrant
www.quicklogic.com
4th Quadrant
Clock
Tree
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