M29W004B-100N1TR STMICROELECTRONICS [STMicroelectronics], M29W004B-100N1TR Datasheet - Page 4

• Manufacturer Part Number: M29W004B-100N1TR
• Description: 4 Mbit 512Kb x8, Boot Block Low Voltage Single Supply Flash Memory
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

M29W004T, M29W004B
Figure 3. Memory Map and Block Address Table (x8)
Output Enable (G). The Output Enable gates the
outputs through the data buffers during a read
operation. When G is High the outputs are High
impedance. G must be forced to V
Block Protection and Unprotection operations.
Write Enable (W). This input controls writing to the
Command Register and Address and Data latches.
Ready/Busy Output (RB). Ready/Busy is an
open-drain output and gives the internal state of the
P/E.C. of the device. When RB is Low, the device
is Busy with a Program or Erase operation and it
will not accept any additional program or erase
instructions except the Erase Suspend instruction.
When RB is High, the device is ready for any Read,
Program or Erase operation. The RB will also be
High when the memory is put in Erase Suspend or
Standby modes.
Reset/Block Temporary Unprotect Input (RP).
The RP Input provides hardware reset and pro-
tected block(s) temporary unprotection functions.
Reset of the memory is acheived by pulling RP to
V
4/30
IL
for at least t
7FFFFh
7BFFFh
6FFFFh
5FFFFh
4FFFFh
3FFFFh
2FFFFh
1FFFFh
0FFFFh
7C000h
79FFFh
77FFFh
7A000h
78000h
70000h
60000h
50000h
40000h
30000h
20000h
10000h
00000h
PLPX
. When the reset pulse is given,
8K PARAMETER BLOCK
8K PARAMETER BLOCK
16K BOOT BLOCK
32K MAIN BLOCK
64K MAIN BLOCK
64K MAIN BLOCK
64K MAIN BLOCK
64K MAIN BLOCK
64K MAIN BLOCK
64K MAIN BLOCK
64K MAIN BLOCK
M29W004T
ID
level during
if the memory is in Read or Standby modes, it will
be available for new operations in t
rising edge of RP. If the memory is in Erase, Erase
Suspend or Program modes the reset will take
t
The end of the memory reset will be indicated by
the rising edge of RB. A hardware reset during an
Erase or Program operation will corrupt the data
being programmed or the sector(s) being erased.
See Table 14 and Figure 9.
Temporary block unprotection is made by holding
RP at V
blocks can be programmed or erased. The transi-
tion of RP from V
When RP is returned from V
temporarily unprotected will be again protected.
See Table 15 and Figure 9.
V
operations (Read, Program and Erase).
V
measurements.
PLYH
CC
SS
7FFFFh
6FFFFh
5FFFFh
4FFFFh
3FFFFh
2FFFFh
1FFFFh
0FFFFh
07FFFh
05FFFh
03FFFh
70000h
60000h
50000h
40000h
30000h
20000h
10000h
08000h
06000h
04000h
00000h
Ground. V
Supply Voltage. The power supply for all
during which the RB signal will be held at V
ID
. In this condition previously protected
8K PARAMETER BLOCK
8K PARAMETER BLOCK
16K BOOT BLOCK
64K MAIN BLOCK
64K MAIN BLOCK
64K MAIN BLOCK
64K MAIN BLOCK
64K MAIN BLOCK
64K MAIN BLOCK
64K MAIN BLOCK
32K MAIN BLOCK
SS
IH
M29W004B
is the reference for all voltage
to V
ID
must slower than t
AI02093
ID
to V
PHEL
IH
all blocks
after the
PHPHH
IL
.
.