M29W004B-100N1TR STMICROELECTRONICS [STMicroelectronics], M29W004B-100N1TR Datasheet - Page 6

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M29W004B-100N1TR

Manufacturer Part Number
M29W004B-100N1TR
Description
4 Mbit 512Kb x8, Boot Block Low Voltage Single Supply Flash Memory
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
M29W004T, M29W004B
DEVICE OPERATIONS
See Tables 4, 5 and 6.
Read. Read operations are used to output the
contents of the Memory Array, the Electronic Sig-
nature, the Status Register or the Block Protection
Status. Both Chip Enable E and Output Enable G
must be low in order to read the output of the
memory.
Write. Write operations are used to give Instruction
Commands to the memory or to latch input data to
be programmed. A write operation is initiated when
Chip Enable E is Low and Write Enable W is Low
with Output Enable G High. Addresses are latched
on the falling edge of W or E whichever occurs last.
Commands and Input Data are latched on the rising
edge of W or E whichever occurs first.
Output Disable. The data outputs are high imped-
ance when the Output Enable G is High with Write
Enable W High.
Standby. The memory is in standby when Chip
Enable E is High and the P/E.C. is idle. The power
consumption is reduced to the standby level and
the outputs are high impedance, independent of
the Output Enable G or Write Enable W inputs.
Automatic Standby. After 150ns of bus inactivity
and when CMOS levels are driving the addresses,
the chip automatically enters a pseudo-standby
mode where consumption is reduced to the CMOS
standby value, while outputs still drive the bus.
Electronic Signature. Two codes identifying the
manufacturer and the device can be read from the
memory. The manufacturer’s code for STMi-
croelectronics is 20h, the device code is EAh for
the M29W004T (Top Boot) and EBh for the
M29W004B (Bottom Boot). These codes allow pro-
gramming equipment or applications to automat-
ically match their interface to the characteristics of
the M29W004. The Electronic Signature is output
by a Read operation when the voltage applied to
A9 is at V
manufacturer code is output when the Address
input A0 is Low and the device code when this
input is High. Other Address inputs are ignored.
The Electronic Signature can also be read, without
raising A9 to V
tion AS.
6/30
ID
and address input A1 is Low. The
ID
, by giving the memory the Instruc-
Block Protection. Each block can be separately
protected against Program or Erase on program-
ming equipment. Block protection provides addi-
tional data security, as it disables all program or
erase operations. This mode is activated when both
A9 and G are raised to V
block is applied on A13-A18. The Block Protection
algorithm is shown in Figure 14. Block protection is
initiated on the edge of W falling to V
a delay of 100 s, the edge of W rising to V
the protection operations. Block protection verify is
achieved by bringing G, E, A0 and A6 to V
to V
conditions, reading the data output will yield 01h if
the block defined by the inputs on A13-A18 is
protected. Any attempt to program or erase a pro-
tected block will be ignored by the device.
Block Temporary Unprotection. Any previously
protected block can be temporarily unprotected in
order to change stored data. The temporary unpro-
tection mode is activated by bringing RP to V
During the temporary unprotection mode the pre-
viously protected blocks are unprotected. A block
can be selected and data can be modified by
executing the Erase or Program instruction with the
RP signal held at V
all the previously protected blocks are again pro-
tected.
Block Unprotection. All protected blocks can be
unprotected on programming equipment to allow
updating of bit contents. All blocks must first be
protected before the unprotection operation. Block
unprotection is activated when A9, G and E are at
V
algorithm is shown in Figure 15. Unprotection is
initiated by the edge of W falling to V
of 10ms, the unprotection operation will end. Un-
protection verify is achieved by bringing G and E to
V
remains at V
output data will yield 00h if the block defined by the
inputs A13-A18 has been succesfully unprotected.
Each block must be separately verified by giving its
address in order to ensure that it has been unpro-
tected.
ID
IL
while A0 is at V
IH
and A12, A15 at V
, while W is at V
ID
. In these conditions, reading the
IL
ID
, A6 and A1 are at V
. When RP is returned to V
IH
IH
and A9 at V
. The Block Unprotection
ID
and an address in the
ID
IL
. Under these
. After a delay
IL
. Then after
IH
IL
IH
and A9
and A1
ends
ID
IH
.
,

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