AD6657ABBCZ AD [Analog Devices], AD6657ABBCZ Datasheet - Page 9

• Manufacturer Part Number: AD6657ABBCZ
• Description: Quad IF Receiver
• Manufacturer: AD [Analog Devices]

Data Sheet
SWITCHING SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, f
otherwise noted.
Table 4.
Parameter
CLOCK INPUT PARAMETERS
DATA OUTPUT PARAMETERS
OUT-OF-RANGE RECOVERY TIME
1
2
3
Data Output Timing Diagram
Conversion rate is the clock rate after the divider.
See Figure 2 for details.
Wake-up time is dependent on the value of the decoupling capacitors.
Input Clock Rate
Conversion Rate
CLK Pulse Width High (t
Aperture Delay (t
Aperture Uncertainty (Jitter, t
Data Propagation Delay (t
DCO Propagation Delay (t
DCO to Data Skew (t
Pipeline Delay (Latency)
Wake-Up Time (from Standby)
Wake-Up Time (from Power Down)
With NSR Enabled
D10+AB (MSB)
D10–AB (MSB)
D0+AB (LSB)
D0–AB (LSB)
DCO+
DCO–
CLK+
CLK–
VIN
1
Figure 2. Data Output Timing (Timing for Channel C and Channel D Is Identical to Timing for Channel A and Channel B)
A
)
2
SKEW
D10A
D0A
CH
)
2
)
DCO
PD
2
)
2
)
D10B
2
D0B
J
N – 1
)
3
S
= 185 MSPS, 1.75 V p-p differential input, VIN = −1.0 dBFS differential input, and default SPI, unless
t
CH
3
D10A
D0A
t
DCO
t
CL
D10B
D0B
t
N
PD
t
A
1/
D10A
D0A
t
f
SKEW
S
Temperature
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Rev. 0 | Page 9 of 36
D10B
D0B
N + 1
D10A
D0A
Min
40
3.0
3.1
−41
D10B
D0B
N + 2
D10A
D0A
N + 3
Typ
185
2.7
1.3
0.13
4.0
4.0
+6.1
9
12
0.5
310
2
D10B
D0B
D10A
D0A
D10B
N + 4
D0B
Max
625
200
4.9
4.9
+33
D10A
D0A
D10B
N + 5
D0B
AD6657A
Unit
MHz
MSPS
ns
ns
ps rms
ns
ns
ns
Cycles
Cycles
µs
µs
Cycles