MC68HC705J MOTOROLA [Motorola, Inc], MC68HC705J Datasheet - Page 41

• Manufacturer Part Number: MC68HC705J
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

MC68HC705J1A — Rev. 4.0
MOTOROLA
NOTE:
Address:
Take these steps to program the mask option register:
SOSCD — Short Oscillator Delay Bit
EPMSEC — EPROM Security Bit
OSCRES — Oscillator Internal Resistor Bit
Program the OSCRES bit to logic 0 in devices using RC oscillators.
Reset:
Read:
Write:
1. Apply the programming voltage, V
2. Write to the MOR.
3. Set the MPGM bit and wait for a time, t
4. Clear the MPGM bit.
5. Reset the MCU.
The SOSCD bit controls the oscillator stabilization counter. The
normal stabilization delay following reset or exit from stop mode is
4064 t
delay.
The EPMSEC bit controls access to the EPROM/OTPROM.
The OSCRES bit enables a 2-M
circuit.
1 = Short oscillator delay enabled
0 = Short oscillator delay disabled
1 = External access to EPROM/OTPROM denied
0 = External access to EPROM/OTPROM not denied
1 = Oscillator internal resistor enabled
0 = Oscillator internal resistor disabled
SOSCD
$07F1
Bit 7
cyc
. Setting SOSCD enables a short oscillator stabilization
Figure 2-4. Mask Option Register (MOR)
EPMSEC OSCRES
6
Memory
5
Unaffected by reset
SWAIT
4
internal resistor in the oscillator
PP
SWPDI
3
, to the IRQ/V
MPGM
PIRQ
.
2
Mask Option Register
PP
LEVEL
1
Technical Data
pin.
Memory
COPEN
Bit 0
41