FIN224AC_0611 FAIRCHILD [Fairchild Semiconductor], FIN224AC_0611 Datasheet
FIN224AC_0611
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FIN224AC_0611 Summary of contents
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FIN224AC µSerDes 22-Bit Bi-Directional Serializer/Deserializer ™ Features ■ Industry smallest 22-bit Serializer/ Deserializer pair ■ Low power for minimum impact on battery life – Multiple power-down modes ■ 100nA in standby mode, 5mA typical operating conditions ■ Highly rolled LVCMOS ...
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Basic Concept LVCMOS 22 Functional Block Diagram CKREF STROBE DP[21:22] DP[1:20] DP[23:24] CKP S1 S2 DIRI © 2006 Fairchild Semiconductor Corporation FIN224AC Rev.1.1.2 CTL FIN224AC Serializer 4 Figure 1. Conceptual Diagram PLL 0 Boundary Generator I cksint Serializer Control Serializer ...
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Terminal Description Terminal Number of Name I/O Type Terminals DP[1:20] I/O DP[21:22] I DP[23:24] O CKREF IN STROBE IN CKP OUT DSO+ / DSI- DIFF-I/O DSO- / DSI+ CKSI+ DIFF-IN CKSI- CKSO+ DIFF-OUT CKSO DIRI IN ...
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Connection Diagrams © 2006 Fairchild Semiconductor Corporation FIN224AC Rev.1.1.2 DP[9] 1 DP[10] 2 DP[11] 3 DP[12 DDP CKP 6 DP[13] 7 DP[14] 8 DP[15] 9 DP[16] 10 Figure 3. Terminal Assignments for µBGA (Top View) Pin Assignments ...
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Control Logic Circuitry The FIN224AC has the ability to be used as a 22-bit seri- alizer or a 22-bit deserializer. Pins S1 and S2 must be set to accommodate the clock reference input frequency range of the serializer. Table 1 ...
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Serializer Operation Mode The serializer configurations are described in the following sections. The basic serialization circuitry works essentially identically in these modes, but the actual data and clock streams differ depending on if CKREF is the same as the STROBE ...
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Serializer Operation Mode Serializer Operation: (Figure 7), MODE 3 ( 1), DIRI = 1, CKREF Divide by 2 mode CKREF DP[1:24] WORD n-1 STROBE DSO CKS0 No Data Figure 7. CKREF > 2x ...
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Deserializer Operation Mode The operation of the deserializer is only dependent upon the data received on the DSI data signal pair and the CKSI clock signal pair. The following two sections describe the operation of the deserializer under two distinct ...
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LVCMOS Data I/O The LVCMOS input buffers have a nominal threshold value equal to half V . The input buffers are only oper- DD ational when the device is operating as a serializer. When the device is operating as a ...
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Application Mode Diagrams µSerDes Serializer U20 TP6 VDDP A6 PIXCLK_M CKREF B5 STROBE F6 DIRI F5 GPIO_MODE DP24 J4 DP23 J3 DP22 F3 LCD_ENABLE_M DP21 J2 LCD_VSYNC_M DP20 J1 LCD_HSYNC_M DP19 F2 LCD17_M DP18 F1 LCD16_M ...
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Absolute Maximum Ratings The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not ...
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DC Electrical Characteristics Over-supply voltage and operating temperature ranges, unless otherwise specified. Symbol Parameter LVCMOS I/O V Input High Voltage IH V Input Low Voltage IL Output High Voltage V OH Output Low Voltage Input Current IN ...
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Power Supply Currents Symbol Parameter IDDA1 VDDA Serializer Static Supply Cur- rent IDDA2 VDDA Deserializer Static Supply Current IDDS1 VDDS Serializer Static Supply Cur- rent IDDS2 VDDS Deserializer Static Supply Current IDD_PD VDD Power-Down Supply Current IDD_PD = IDDA IDD_SER1 ...
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AC Electrical Characteristics Characteristics at recommended over-supply voltage and operating temperature ranges, unless otherwise specified. Symbol Parameter Serializer Input Operating Conditions CKREF Clock Period t TCP (2MHz – 26MHz) CKREF Frequency Relative to f REF STROBE t CKREF Clock High ...
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Notes : 5. Typical values are given for V device and negative values means current flowing out of the pins. Voltages are referenced to GROUND unless otherwise specified (except DVOD and VOD). 6. Skew is measured from either the rising ...
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AC Loading and Waveforms t ROLH 80% 80% 20% DPn Figure 14. LVCMOS Output Load and Transition Times t CLKT 90% 10% t TCP V IH CKREF 50 CPWH CPWL Figure 16. LVCMOS Clock Parameters t TPLS0 ...
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AC Loading and Waveforms CKSI DIFF CKSI+ CKP Figure 20. Deserializer Clock Propagation Delay t TPPLD1 CKS0 Figure 22. PLL Power-Down Time Note: If S1(2) transitioning then S2(1) must = 0 for test to ...
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Tape and Reel Specification BGA Embossed Tape Dimension Dimensions are in millimeters Package 3.5 x 4.5 TBD TBD 1.55 ±0.1 ±0.1 ±0.05 Notes : A0, B0, and ...
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Dimensions are in millimeters. 10° maximum component rotation Sketch A (Side or Front Sectional View) Component Rotation Dia A max Tape Width Dia A Dim 330 Max. 1.5 Min. 16 © 2006 Fairchild Semiconductor Corporation FIN224AC Rev.1.1.2 ...
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Tape and Reel Specification MLP Embossed Tape Dimension Dimensions are in millimeters Package 5.35 5.35 ±0.1 ±0.1 1.55 ±0. 6.30 6.30 ...
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Physical Dimensions Dimensions are in millimeters unless otherwise noted. 2X 0.10 C TERMINAL A1 CORNER INDEX AREA (QA CONTROL VALUE) 1.00 MAX 0. SEATING PLANE Figure 25. Pb-Free 42-Ball Ultra Small Scale Ball Grid Array (USS-BGA), ...
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Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 26. Pb-Free 40-Terminal Molded Leadless Package (MLP), Quad, JEDEC MO-220, 6mm Square © 2006 Fairchild Semiconductor Corporation FIN224AC Rev.1.1.2 (DATUM A) 22 www.fairchildsemi.com ...
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Fairchild Semiconductor Corporation FIN224AC Rev.1.1.2 23 www.fairchildsemi.com ...