HC55120CM INTERSIL [Intersil Corporation], HC55120CM Datasheet - Page 19

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HC55120CM

Manufacturer Part Number
HC55120CM
Description
Low Power Universal SLIC Family
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet

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Part Number:
HC55120CMZ
Manufacturer:
Intersil
Quantity:
10 000
Digital Logic Inputs
Table 1 is the logic truth table for the 3V to 5V logic input
pins. A combination of the control pins C3, C2 and C1 select
1 of the possible 6 operating states. The 8th state listed is
Thermal Shutdown. Thermal Shutdown protection is invoked
if a fault condition on the tip or ring causes the junction
temperature of the die to exceed 175
each operating state and the control logic follows:
Open Circuit State (C3 = 0, C2 = 0, C1 = 0)
In this state, the tip and ring outputs are in a high impedance
condition (>1M ). No supervisory functions are available
and SHD and GKD outputs are at a TTL high level.
4-wire loopback testing can be performed in this state. With
the PTG pin floating, the signal on the V
of phase and approximately 2 times the V
the PTG pin is grounded, then the amplitude will be
approximately the same as its input and 180
Ringing State (C3 = 0, C2 = 0, C1 = 1)
In this state, the output of the ring relay driver pin (RRLY)
goes low (energizing the ring relay to connect the ringing
signal to the phone) if either of the following two conditions
are satisfied:
HC55120, HC55121, HC55130, HC55131, HC55140, HC55141, HC55142, HC55143, HC55150, HC55151
STATE
0
1
2
3
4
5
6
7
8
C3
X
0
0
0
0
1
1
1
1
C2
X
0
0
1
1
0
0
1
1
4-19
C1
X
0
1
0
1
0
1
0
1
Open Circuit State
Ringing State
(Previous State cannot be Reverse
Active State)
Forward Active State
Test Active State
Requires previous state to be in the
Forward Active state to determine the
On hook or Off hook status of the line.
Tip Open - Ground Start State
Reserved
Reverse Active State
Test Reversal Active State
Requires previous state to be in the
Reverse Active state to determine the
On hook or Off hook status of the line.
Thermal Shutdown
o
SLIC OPERATING STATE
C. A description of
TX
RX
output is 180
o
input signal. If
out of phase.
TABLE 1. DETECTOR STATES
o
out
4 wire loopback test capability
Ring Trip Detector
Loop Current Detector
Ground Key Detector
On Hook Loopback Detector
Ground Key Detector
Off Hook Loop Current Detector
Line Voltage Detector
Ground Key Detector
Reserved
Loop Current Detector
Ground Key Detector
On Hook Loop Current Detector
Off Hook Loop Current Detector
Line Voltage Detector
(1) The RSYNC_REV pin is grounded through a resistor -
This connection enables the RRLY pin to go low the instant
the ringing state is invoked, without any regard for the ringing
voltage (90V
resistor (34.8k to 70k ) is required to limit the current into
the RSYNC_REV pin.
(2) A ring sync pulse is applied to the RSYNC_REV pin -
This connection enables the RRLY pin to go low at the
command of a ring sync pulse. A ring sync pulse should go
low at zero voltage crossing of the ring signal. This pulse
should have a rise and fall time <400 s and a minimum
pulse width of 2ms.
Zero ring current detection is performed automatically
inside the SLIC. This feature de-energizes the ring relay
slightly before zero current occurs to partially compensate
for the delay in the opening of the relay.
The SHD output will go low when the subscriber goes off
hook. Once SHD is activated, an internal latch will prohibit
the re-ringing of the line until the ringing code is removed
and then reapplied.
The state prior to ringing the phone, can not be the Reverse
Active State. In the reverse active state the polarity of the
voltage on the CRT_REV_LVM capacitor, will make it appear
as if the subscriber is off hook. This subsequently will
activate an internal latch prohibiting the ringing of the line.
ACTIVE DETECTOR
RMS
-120V
RMS
) across the relay contacts. The
HIGH
LOW
LOW
LOW
LOW
SHD
N/A
OUTPUT
GKD_ LVM
HIGH
HIGH
HIGH
HIGH
LOW
N/A

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