HC55120CM INTERSIL [Intersil Corporation], HC55120CM Datasheet - Page 20

• Manufacturer Part Number: HC55120CM
• Description: Low Power Universal SLIC Family
• Manufacturer: INTERSIL [Intersil Corporation]

The GKD_LVM output is disabled (TTL high level) during the
ringing state. Reference the Section titled “Ringing the
Phone” for more information.
Forward Active State (C3 = 0, C2 = 1, C1 = 0)
In this state, the SLIC is fully functional. The tip voltage is more
positive than the ring voltage. The tip and ring output voltages
are an unbalanced DC feed, reference Figure 13. Both SHD
and GKD supervisory functions are active. Reference the
section titled “DC Feed Curve” for more information.
Test Active State (C3 = 0, C2 = 1, C1 = 1)
Proper operation of the Test Active State requires the
previous state be the Forward Active state to determine the
on hook or off hook status of the line. In this state, the SLIC
can perform two different tests.
If the subscriber is on hook when the state is entered, a
loopback test is performed by switching an internal 600
resistor between tip and ring. The current flows through the
internal 600 is unidirectional via blocking diodes. (Cannot be
used in reverse.) When the loopback current flows, the SHD
output will go low and remain there until the state is exited. This
is intended to be a short test since the ability to detect
subscriber off hook is lost during loopback testing. Reference
the section titled “Loopback Tests” for more information.
If the subscriber is off hook when the state is entered, a Line
Voltage Measurement test is performed. The output of the
GKD_LVM pin is a pulse train. The pulse width of the active low
portion of the signal is proportional to the voltage across the tip
and ring pins. If the loop length is such that the SLIC is
operating in constant current, the tip to ring voltage can be used
to determine the length of the line under test. The longer the
line, the larger the tip to ring voltage and the wider the pulse.
This relationship can determine the length of the line for setting
gains in the system. Reference the section titled “Operation of
Line Voltage Measurement” for more information.
Tip Open State (C3 = 1, C2 = 0, C1 = 0)
In this state, the tip output is in a high impedance state
(>250k
has full longitudinal current capability. The Tip Open/Ground
Start state is used to interface to a PBX incoming 2-wire
trunk line. When a ground is applied through a resistor to the
ring lead, this current is detected and presented as a TTL
logic low on the SHD and GKD_LVM output pins.
Reserved (C3 = 1, C2 = 0, C1 = 1)
This state is undefined and reserved for future use.
Reverse Active State (C3 = 1, C2 = 1, C1 = 0)
In this state, the SLIC is fully functional. The ring voltage is
more positive than the tip voltage. The tip and ring output
voltages are an unbalanced DC feed, reference Figure 13.
The polarity reversal time is determined by the RC time
constant of the RSYNC_REV resistor and the
CRT_REV_LVM capacitor. Capacitor CRT_REV_LVM
HC55120, HC55121, HC55130, HC55131, HC55140, HC55141, HC55142, HC55143, HC55150, HC55151
and the ring output is capable of full operation, i.e.
4-20
performs three different functions: Ring trip filtering, polarity
reversal time and line voltage measurement. It is
recommended that programming of the reversal time be
accomplished by changing the value of RSYNC_REV resistor
(see Figure 18). The value of RSYNC_REV resistor is limited
between 34.8K (10ms) and 73.2k (21ms). Equation 39 gives
the formula for programming the reversal time.
Both SHD and GKD supervisory functions are active.
Reference the section titled “Polarity Reversal” for more
information.
Test Reversal Active State (C3 = 1, C2 = 1, C1 = 1)
Proper operation of the Test Reversal Active State requires
the previous state be the Reverse Active state to determine
the on hook or off hook status of the line.
If the subscriber is on hook when the state is entered, the
SLIC’s tip and ring voltages are the same as the Reverse
Active state. The SHD output will go low when the subscriber
goes off hook and the GKD_LVM output is disabled (TTL
level high). (Note: operation is the same as the Reverse
Active state with the GKD_LVM output disabled.)
If the subscriber is off hook when the state is entered, a
Line Voltage Measurement test is performed.
The output of the GKD_LVM pin is a pulse train. The pulse width
of the active low portion of the signal is proportional to the voltage
across the tip and ring pins. If the loop length is such that the
SLIC is operating in constant current mode, the tip to ring voltage
can be used to determine the length of the line under test. The
longer the line, the larger the tip to ring voltage and the wider the
pulse. This relationship can determine the length of the line for
setting gains in the system. Reference the section titled
“Operation of Line Voltage Measurement” for more information.
Thermal Shutdown
The UniSLIC14’s thermal shutdown protection is invoked if a
fault condition causes the junction temperature of the die to
exceed about 175
both detector outputs go low (SHD and GKD_LVM) and one
of two things can happen.
For marginal faults where loop current is flowing during the
time of the over-temperature condition, foldback loop current
limiting reduces the loop current by reducing the tip to ring
voltage. An equilibrium condition will exist that maintains the
junction temperature at about 175
is removed.
For short circuit faults (tip or ring to ground, or to a supply,
etc.) that result in an over-temperature condition, the
foldback current limiting will try to maintain an equilibrium at
about 175
device will thermally shutdown and disconnect tip and ring
until the junction temperature falls to approximately 150
RSYNC REV
–
o
C. If the junction temperature keeps rising, the
=
3.47k
o
C. Once the thermal limit is exceeded,
ReversalTime ms
o
C until the fault condition
(EQ. 39)
o
C.