HC55120CM INTERSIL [Intersil Corporation], HC55120CM Datasheet - Page 22

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HC55120CM

Manufacturer Part Number
HC55120CM
Description
Low Power Universal SLIC Family
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet

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Operation of Line Voltage Measurement
A few of the SLICs in the UniSLIC14 family feature Line
Voltage Measurement (LVM) capability. This feature provides
a pulse on the GKD_LVM output pin that is proportional to
the loop voltage. Knowing the loop voltage and thus the loop
length, other basic cable characteristics such as attenuation
and capacitance can be inferred. Decisions can be made
about gain switching in the CODEC to overcome line losses
and verification of the 2-wire circuit integrity.
The LVM function can only be activated in the off hook
condition in either the forward or reverse operating states.
The LVM uses the ring signal supplied to the SLIC as a
timebase generator. The loop resistance is determined by
monitoring the pulse width of the output signal on the
GKD_LVM pin. The output signal on the GKD_LVM pin is a
square wave for which the average duration of the low state
is proportional to the average voltage between the tip and
ring terminals. The loop resistance is determined by the tip
to ring voltage and the constant loop current. Reference
Figure 20.
Although the logic state changes to the Test Active State
when performing this test, the SLIC is still powered up in the
active state (forward or reverse) and the subscriber is
unaware the measurement is being taken.
HC55120, HC55121, HC55130, HC55131, HC55140, HC55141, HC55142, HC55143, HC55150, HC55151
RINGING CURRENT
RINGING VOLTAGE
FIGURE 20. OPERATION OF THE LINE VOLTAGE
RINGING CODE
RELAY DRIVER
SHD OUTPUT
RING SYNC
RING
GEN
APPLIED
IN LINE
PULSE
MEASUREMENT CIRCUIT
FIGURE 19. RINGING SEQUENCE
OFF
TIP
RING
DR
DT
(A)
4-22
UniSLIC14
GKD_LVM
ON
PULSE WIDTH
PROPORTIONAL TO
LOOP LENGTH
LOOP LENGTH
(B)
FREQ
RING
GEN
(C)
OFF
Polarity Reversal
Most of the SLICs in the UniSLIC14 family feature full
polarity reversal. Full polarity reversal means that the SLIC
can: transmit, determine the status of the line (on hook and
off hook) and provide “silent” polarity reversal. The value of
RSYNC_REV resistor is limited between 34.8k (10ms) and
73.2k (21ms). Reference Equation 39 to program the polarity
reversal time.
Transhybrid Balance
If a low cost CODEC is chosen that does not have a transmit
op-amp, the UniSLIC14 family of SLICs can solve this
problem without the need for an additional op-amp. The
solution is to use the Programmable Transmit Gain pin (PTG)
as an input for the receive signal (V
connected to a divider network (R1 and R2 Figure 21) and the
value of R1 and R2 is much less than the internal 500k
resistors, two things happen. First the transmit gain from V
to V
bottom 500k resistor with the much smaller external resistor.
And second, the input signal from V
half by resistors R1 and R2. Transhybrid balance occurs when
these two, equal but opposite in phase, signals are cancelled
at the input to the output buffer.
Loopback Tests
4-Wire Loopback Test
This feature can be very useful in the testing of line cards
during the manufacturing process and in field use. The test
is unobtrusive, allowing it to be used in live systems.
Reference Figure 22.
Most systems do not provide 4-wire loopback test
capability because of costly relays needed to switch in
external loads. All the SLICs in the UniSLIC14 family can
easily provide this function when configured in the Open
Circuit logic state. With the PTG pin floating, the signal on
the V
times the V
the amplitude will be approximately the same as the input
signal and 180
FIGURE 21. TRANSHYBRID BALANCE USING THE PTG PIN
TX
5
TX
is reduced by half. This is the result of shorting out the
I
X
output is 180
RX
500K
500K
input signal. If the PTG pin is grounded, then
o
out of phase.
500K
o
I
X
out of phase and approximately 2
500K
UniSLIC14
+
-
A = 1
RX
RX
V
PTG
V
). When the PTG pin is
TX
R1
RX
is also decreased in
R2
V
V
TX
RX
+
-
+
-
RX

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