W25Q64DWSFIG WINBOND [Winbond], W25Q64DWSFIG Datasheet - Page 27

• Manufacturer Part Number: W25Q64DWSFIG
• Description: 1.8V 64M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI
• Manufacturer: WINBOND [Winbond]

10.2.11 Read Data (03h)
The Read Data instruction allows one or more data bytes to be sequentially read from the memory. The
instruction is initiated by driving the /CS pin low and then shifting the instruction code “03h” followed by a
24-bit address (A23-A0) into the DI pin. The code and address bits are latched on the rising edge of the
CLK pin. After the address is received, the data byte of the addressed memory location will be shifted out
on the DO pin at the falling edge of CLK with most significant bit (MSB) first. The address is automatically
incremented to the next higher address after each byte of data is shifted out allowing for a continuous
stream of data. This means that the entire memory can be accessed with a single instruction as long as
the clock continues. The instruction is completed by driving /CS high.
The Read Data instruction sequence is shown in figure 10. If a Read Data instruction is issued while an
Erase, Program or Write cycle is in process (BUSY=1) the instruction is ignored and will not have any
effects on the current cycle. The Read Data instruction allows clock rates from D.C. to a maximum of f
(see AC Electrical Characteristics).
The Read Data (03h) instruction is only supported in Standard SPI mode.
(IO
(IO
CLK
/CS
DO
DI
0
1
)
)
Mode 3
Mode 0
*
= MSB
0
1
Instruction (03h)
2
3
4
High Impedance
Figure 10. Read Data Instruction (SPI Mode only)
5
6
7
23
*
8
22
9
- 27 -
21
10
24-Bit Address
3
28
2
29
Publication Release Date: January 13, 2011
1
30
0
31
*
7
32
6
33
5
34
Data Out 1
4
Preliminary - Revision C
35
W25Q64DW
3
36
2
37
1
38
0
39
7
R