W25Q64DWSFIG WINBOND [Winbond], W25Q64DWSFIG Datasheet - Page 45

• Manufacturer Part Number: W25Q64DWSFIG
• Description: 1.8V 64M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI
• Manufacturer: WINBOND [Winbond]

10.2.22 Sector Erase (20h)
The Sector Erase instruction sets all memory within a specified sector (4K-bytes) to the erased state of all
1s (FFh). A Write Enable instruction must be executed before the device will accept the Sector Erase
Instruction (Status Register bit WEL must equal 1). The instruction is initiated by driving the /CS pin low
and shifting the instruction code “20h” followed a 24-bit sector address (A23-A0) (see Figure 2). The
Sector Erase instruction sequence is shown in Figure 21a & 21b.
The /CS pin must be driven high after the eighth bit of the last byte has been latched. If this is not done
the Sector Erase instruction will not be executed. After /CS is driven high, the self-timed Sector Erase
instruction will commence for a time duration of t
cycle is in progress, the Read Status Register instruction may still be accessed for checking the status of
the BUSY bit. The BUSY bit is a 1 during the Sector Erase cycle and becomes a 0 when the cycle is
finished and the device is ready to accept other instructions again. After the Sector Erase cycle has
finished the Write Enable Latch (WEL) bit in the Status Register is cleared to 0. The Sector Erase
instruction will not be executed if the addressed page is protected by the Block Protect (CMP, SEC, TB,
BP2, BP1, and BP0) bits (see Status Register Memory Protection table).
(IO
(IO
CLK
/CS
DO
DI
0
1
)
)
Mode 3
Mode 0
*
= MSB
CLK
/CS
IO
IO
IO
IO
0
1
2
3
0
Mode 3
Mode 0
Figure 21b. Sector Erase Instruction (QPI Mode)
Figure 21a. Sector Erase Instruction (SPI Mode)
1
Instruction (20h)
2
Instruction
3
0
20h
4
1
High Impedance
20
21
22
23
A23-16
- 45 -
5
2
SE
16
17
18
19
(See AC Characteristics). While the Sector Erase
6
3
12
13
14
15
A15-8
7
4
23
10
11
*
8
9
8
5
22
Publication Release Date: January 13, 2011
4
5
6
7
24-Bit Address
A7-0
9
6
0
1
2
3
7
2
29
Mode 3
Mode 0
1
30
0
31
Preliminary - Revision C
W25Q64DW
Mode 3
Mode 0