W25Q64DWSFIG WINBOND [Winbond], W25Q64DWSFIG Datasheet - Page 30

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W25Q64DWSFIG

Manufacturer Part Number
W25Q64DWSFIG
Description
1.8V 64M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI
Manufacturer
WINBOND [Winbond]
Datasheet
10.2.13 Fast Read Dual Output (3Bh)
The Fast Read Dual Output (3Bh) instruction is similar to the standard Fast Read (0Bh) instruction except
that data is output on two pins; IO
twice the rate of standard SPI devices. The Fast Read Dual Output instruction is ideal for quickly
downloading code from Flash to RAM upon power-up or for applications that cache code-segments to
RAM for execution.
Similar to the Fast Read instruction, the Fast Read Dual Output instruction can operate at the highest
possible frequency of F
“dummy” clocks after the 24-bit address as shown in Figure 12. The dummy clocks allow the device's
internal circuits additional time for setting up the initial address. The input data during the dummy clocks
is “don’t care”. However, the IO
out clock.
(IO
(IO
(IO
(IO
CLK
CLK
/CS
/CS
DO
DO
DI
DI
0
1
0
1
)
)
)
)
Mode 3
Mode 0
0
31
*
= MSB
32
33
0
High Impedance
Dummy Clocks
34
1
35
Instruction (3Bh)
R
2
(see AC Electrical Characteristics). This is accomplished by adding eight
Figure 12. Fast Read Dual Output Instruction (SPI Mode only)
36
3
37
0
4
pin should be high-impedance prior to the falling edge of the first data
High Impedance
0
38
and IO
5
39
6
*
6
7
40
1
7
. This allows data to be transferred from the W25Q64DW at
Data Out 1
4
5
23
41
*
8
IO
Input to Output
2
3
22
42
- 30 -
0
switches from
9
0
1
21
43
10
24-Bit Address
*
6
7
44
Data Out 2
4
5
45
3
28
2
3
46
2
29
0
1
47
1
30
*
6
7
48
0
31
Data Out 3
4
5
49
2
3
50
0
1
51
W25Q64DW
*
6
7
52
Data Out 4
4
5
53
2
3
54
0
1
55
6
7

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