NAND08GW3C2A NUMONYX [Numonyx B.V], NAND08GW3C2A Datasheet - Page 32

• Manufacturer Part Number: NAND08GW3C2A
• Description: 8/16 Gbit, 2112 byte page, 3 V supply, multilevel, multiplane, NAND Flash memory
• Manufacturer: NUMONYX [Numonyx B.V]

Concurrent operations and ERS on the NAND16GW3C2A
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Concurrent operations and ERS on the
NAND16GW3C2A
The NAND16GW3C2A is composed by two 8-Gbit dice stacked together. This configuration
allows the device to support concurrent operations. This means that while performing an
operation in one die (Erase, Read, Program, etc.), another operation is possible in the other
die.
The standard Read Status Register (ERS) operation returns the status of the
NAND16GW3C2A device. To provide information on each 8-Gbit die, the NAND16GW3C2A
features an Extended Read Status Register command that allows to check independently
the status of each die.
The following steps are required to perform concurrent operations:
1.
2.
3.
4.
All combinations of operations are possible except executing Read on both dice. This is due
to the fact that the input/output bus is common to both dice.
Refer to
sequence, and to
Table 13.
Read 2nd die status
Read 1st die status
Select one of the two dice by setting the most significant address bit A31 to ‘0’ or ‘1’.
Execute one operation on this die.
Launch a concurrent operation on the other die.
Check the status of these operations by performing an Extended Read Status Register
operation.
Command
Table 13
Extended Read Status Register commands
for the description of the Extended Read Status Register command
Table
0x7FFFFFFF < Address ≤ 0xFFFFFFF
8. for the definition of the Status Register bits.
Address ≤ 0x7FFFFFFF
Address range
NAND08GW3C2A, NAND16GW3C2A
1 bus write cycle
F2h
F1h