HYI39S128160FT-7 QIMONDA [Qimonda AG], HYI39S128160FT-7 Datasheet - Page 14

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HYI39S128160FT-7

Manufacturer Part Number
HYI39S128160FT-7
Description
128-MBit Synchronous DRAM
Manufacturer
QIMONDA [Qimonda AG]
Datasheet
1) Currents values will be added when available.
2)
3) These parameters depend on the cycle rate. All values are measured at 133 MHz for -7 with the outputs open. Input signals are changed
4) These parameters are measured with continuous data stream during read access and all DQ toggling. CL=3 and BL=4 is assumed and
5)
Rev. 1.32, 2007-10
10122006-I6LJ-WV3H
Parameter
Operating Current
One bank active, Burst length = 1
Precharge Standby Current in Power Down Mode
Recharge Standby Current in Non-Power Down Mode
No Operating Current
Active state (max. 4 banks)
Burst Operating Current
Read command cycling
Auto Refresh Current
Auto Refresh command cycling
Self Refresh Current (standard components)
Self Refresh Mode, CKE=0.2 V,
Self Refresh Current (low power components)
Self Refresh Mode, CKE=0.2 V,
Symbol
I
I
I
I
I
I
I
I
DD1
DD2P
DD2N
DD3N
DD3P
DD4
DD5
DD6
T
once during
the
t
RFC
A
= 0 to 70 °C;
V
=
DDQ
t
RFC(min)
current is excluded.
t
CK
“burst refresh”,
.
V
SS
= 0 V;
t
CS =
CS =
CS =
CS =
t
t
RC
RFC
RFC
=
=
= 15.6 μs
V
V
V
t
V
V
t
RC(min)
RFC(min)
IH (min.)
IH (min.)
DD
IH(min)
IH(min)
t
RFC
,
V
= 15.6 μs “distributed refresh”.
t
t
DDQ
CK
CK
,
, CKE ≥
, CKE ≤
, CKE ≤
, CKE≥
I
=infinity
=infinity
O
= 3.3 V ± 0.3 V
= 0 mA
V
V
V
V
IH(min.)
IL(max)
IH(min)
IL(max.)
14
80
–7
Max.
2
22
35
5
65
146
25
3
0.8
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
HY[B/I]39S128[40/80/16][0/7]F[E/T](L)
I
DD
Specifications and Conditions
Note/ Test Condition
1)2)3)4)
1)2)
1)2)
1)2)
1)2)
1)2)4)
1)2)5)
1)2)
1)2)
1)
Low power components at 85 °C
128-MBit Synchronous DRAM
Standard components
IDD Conditions
TABLE 11
TABLE 12
Data Sheet
Symbol
I
I
I
I
I
I
I
I
DD1
DD2P
DD2N
DD3N
DD3P
DD4
DD5
DD6

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