HYI39S128160FT-7 QIMONDA [Qimonda AG], HYI39S128160FT-7 Datasheet - Page 9

• Manufacturer Part Number: HYI39S128160FT-7
• Description: 128-MBit Synchronous DRAM
• Manufacturer: QIMONDA [Qimonda AG]

3
This chapter list all defined commands and their usage for this Synchronous DRAM family.
1) V = Valid, x = Don’t Care, L = Low Level, H = High Level
2) CKEn signal is input level when commands are provided, CKEn-1 signal is input level one clock before the commands are provided.
3) This is the state of the banks designated by BA0, BA1 signals.
Rev. 1.32, 2007-10
10122006-I6LJ-WV3H
Operation
Bank Active
Bank Precharge
Precharge All
Write
Write with Auto
precharge
Read
Read with Auto
precharge
Mode Register Set
No Operation
Burst Stop
Device Deselect
Auto Refresh
Self Refresh Entry
Self Refresh Exit
Power Down/
Clock Suspend Entry
Power Down/
Clock Suspend Exit
Data Write/
Output Enable
Data Write/
Output Disable
Functional Description
Device State
Idle
Any
Any
Active
Active
Active
Active
Idle
Any
Active
Any
Idle
Idle
Idle (Self Refr.)
Active or Idle
or Burst
Active or Idle
or Burst
Active
Active
3)
3)
3)
3)
3)
CKE
n-1
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
L
H
H
1)2)
CKE
n
X
X
X
X
X
X
X
X
X
X
X
H
L
H
L
H
X
X
1)2)
9
DQM
1)2)
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
H
BA0
BA1
V
V
X
V
V
V
V
V
X
X
X
X
X
X
X
X
X
X
1)2)
AP=
A10
V
L
H
L
H
L
H
V
X
X
X
X
X
X
X
X
X
X
HY[B/I]39S128[40/80/16][0/7]F[E/T](L)
Truth Table: Operation Command
1)2)
128-MBit Synchronous DRAM
X
Addr.
1)2)
V
X
X
V
V
V
V
V
X
X
X
X
X
X
X
X
X
CS
)2)
L
L
L
L
L
L
L
L
L
L
H
L
L
H
L
H
L
H
L
X
X
1
RAS
1)2)
L
L
L
H
H
H
H
L
H
H
X
L
L
X
H
X
H
X
H
X
X
TABLE 5
Data Sheet
CAS
)2)
H
H
H
L
L
L
L
L
H
H
X
L
L
X
H
X
H
X
H
X
X
1
WE
1)2)
H
L
L
L
L
H
H
L
H
L
X
H
H
X
X
X
H
X
H
X
X