AK4344ET AKM [Asahi Kasei Microsystems], AK4344ET Datasheet - Page 18

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AK4344ET

Manufacturer Part Number
AK4344ET
Description
100dB 96kHz 24-Bit Stereo 3.3V ?? DAC
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet
2.3-wire μ P I/F mode (MODE bit = “1”)
Internal registers may be written by 3-wire µP interface pins, CSN, CCLK and CDTI. The data on this interface consists
of Chip Address (2bits, C1/0; fixed to “01”), Read/Write (1bit; fixed to “1”, Write only), Register Address (MSB first,
5bits) and Control Data (MSB first, 8bits). AK4344 latches the data on the rising edge of CCLK, so data should clocked in
on the falling edge. The writing of data becomes valid by 16th CCLK after a high to low transition of CSN. CSN should
be set to “H” once after 16 CCLKs for each address. The clock speed of CCLK is 5MHz (max).
PDN pin = “L” resets the registers to their default values. The internal timing circuit is reset by RSTN bit, but the registers
are not initialized.
*The AK4344 does not support the read command and chip address. C1/0 and R/W are fixed to “011”
*When the AK4344 is in the power down mode (PDN pin = “L”) or the MCLK is not provided, writing into the control
The AK4344 can select 4-wire μP I/F mode (MODE bit = “0”) or 3-wire μP I/F mode (MODE bit = “1”). In 3-wire μP I/F
mode, the AK4344 can select the input data of DAC from SDTI1 or SDTI2 data.
MS0641-E-00
register is inhibited.
DAC input select
CCLK
CSN
CDTI
MODE
C1
0
0
1
1
C0
1
R/W
2
C1-C0:
R/W:
A4-A0: Register Address
D7-D0: Control Data
A4
3
Figure 18. Control I/F Timing
A3
4
SEL
x
0
1
Table 5. DAC Input
Chip Address (Fixed to “01”)
READ/WRITE (Fixed to “1”, Write only)
A2
5
A1
6
- 18 -
A0
7
D7
μP / IF
4-wire
3-wire
3-wire
8
D6
9
D5
10 11 12 13 14 15
D4
DAC input
(x: Don’t care)
D3
SDTI1
SDTI1
SDTI2
D2
D1
D0
2007/06

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