SAK-C505L Infineon Technologies AG, SAK-C505L Datasheet - Page 16

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SAK-C505L

Manufacturer Part Number
SAK-C505L
Description
8-bit CMOS Microcontroller
Manufacturer
Infineon Technologies AG
Datasheet

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CPU
The C505L is efficient both as a controller and as an arithmetic processor. It has extensive facilities
for binary and BCD arithmetic and excels in its bit-handling capabilities. Efficient use of program
memory results from an instruction set consisting of 44% one-byte, 41% two-byte, and 15% three-
byte instructions. With a 16-MHz external clock, 58% of the instructions execute in 375 ns (20 MHz:
300 ns).
Special Function Register PSW (Address D0
Bit
CY
AC
F0
RS1
RS0
OV
F1
P
Data Sheet
D0
Bit No. MSB
H
D7
CY
H
Used by arithmetic instruction.
Used by instructions which execute BCD operations.
Register Bank select control bits
These bits are used to select one of the four register banks.
Used by arithmetic instruction.
Set/cleared by hardware after each instruction to indicate an odd/even
number of “one” bits in the accumulator, i.e. even parity.
Function
Carry Flag
Auxiliary Carry Flag
General Purpose Flag
Overflow Flag
General Purpose Flag
Parity Flag
RS1
0
0
1
1
D6
AC
H
D5
RS0
0
1
0
1
F0
H
RS1
D4
Function
Bank 0 selected, data address 00
Bank 1 selected, data address 08
Bank 2 selected, data address 10
Bank 3 selected, data address 18
H
H
14
)
RS0
D3
H
D2
OV
H
D1
F1
H
LSB
D0
P
H
H
H
H
H
Reset Value: 00
-07
-0F
-17
-1F
H
H
H
H
PSW
C505L
06.99
H

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