SAK-C505L Infineon Technologies AG, SAK-C505L Datasheet - Page 65

• Manufacturer Part Number: SAK-C505L
• Description: 8-bit CMOS Microcontroller
• Manufacturer: Infineon Technologies AG

Notes:
1) Capacitive loading on ports 0 and 2 may cause spurious noise pulses to be superimposed on the
2) Capacitive loading on ports 0 and 2 may cause the
3) Power-down modes:
4)
5)
6)
7)
8) Overload conditions under operating conditions occur if the voltage on the respective pin exceeds the
9) Not 100% tested, guaranteed by design characterization
10) The typical
11) The maximum
12) Only valid in programming mode.
Data Sheet
I
DD
and port 3. The noise is due to external bus capacitance discharging into the port 0 and port 2 pins when these
pins make 1-to-0 transitions during bus operation. In the worst case (capacitive loading > 100 pF), the noise
pulse on ALE line may exceed 0.8 V. In such cases it may be desirable to qualify ALE with a schmitt-trigger,
or use an address latch with a schmitt-trigger strobe input.
0.9
I
EA = Port 0 =
V
Conditions for
crystal and the power supply limits.
I
XTAL1 driven with
EA = Port0 = RESET =
is used (approx. 1 mA)
I
XTAL1 driven with
RESET = EA =
software;
I
disabled; XTAL1 driven with
RESET = EA =
software;
XTAL1 driven with
RESET = EA =
with slow-down enabled by software;
specified operating range (i.e.
currents on all port pins may not exceed 50 mA. The supply voltage (
specified limits.
PD1
DD
DD
DD
AREF
(idle mode with slow-down) is measured with all output pins disconnected and with all peripherals disabled;
(idle mode) is measured with all output pins disconnected and with all peripherals disabled;
V
(active mode) is measured with:
(active mode with slow-down) is measured with all output pins disconnected and with all peripherals
is measured under following conditions:
DD
=
specification when the address lines are stabilizing.
V
DD
I
; all other pins are disconnected.
DD
I
I
PD2
values are periodically measured at
V
V
V
DD
V
SS
SS
DD
SS
values are measured under worst case conditions (
and
t
t
R
R
; Port0 =
; Port0 =
; all other pins are disconnected; the microcontroller is put into slow-down mode by
; RESET =
/
/
t
t
t
R
F
F
I
/
V
= 5 ns, 50% duty cycle,
= 5 ns, 50% duty cycle,
PD3
t
F
DD
= 5 ns, 50% duty cycle ,
; all other pins are disconnected.
are similar except that XTAL3 and XTAL4 have a valid input from the 32.768 KHz
t
V
R
V
/
DD
V
DD
t
F
OV
= 5 ns, 50% duty cycle,
V
; all other pins are disconnected; the microcontroller is put into idle mode by
; all other pins are disconnected; the microcontroller is put into idle mode
SS
>
V
.; XTAL2 = XTAL4 = N.C.; XTAL1 = XTAL3 =
DD
+
0.5V or
V
V
IL
IL
63
=
=
T
V
V
V
A
V
V
SS
SS
OV
= + 25 C but not 100% tested.
IL
OH
V
=
+ 0.5 V,
+ 0.5 V,
<
on ALE and PSEN to momentarily fall below the
IL
V
V
=
I
SS
SS
DD
V
+ 0.5 V,
–
SS
would be slightly higher if a crystal oscillator
V
V
0.5V). The absolute sum of input overload
+ 0.5 V,
IH
IH
=
=
T
V
V
V
A
DD
DD
V
DD
= 0 C or – 40 C and
IH
V
and
– 0.5 V; XTAL2 = N.C.;
– 0.5 V; XTAL2 = N.C.;
IH
=
V
=
V
DD
V
SS
DD
– 0.5 V; XTAL2 = N.C.;
) must remain within the
– 0.5 V; XTAL2 = N.C.;
V
SS
;
V
V
AGND
DD
V
OL
C505L
= 5.5 V)
of ALE
=
06.99
V
SS
;