SAK-C505L Infineon Technologies AG, SAK-C505L Datasheet - Page 56

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SAK-C505L

Manufacturer Part Number
SAK-C505L
Description
8-bit CMOS Microcontroller
Manufacturer
Infineon Technologies AG
Datasheet

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Table 11 is a functional description of all C505L pins that are required for OTP memory
programming.
Table 11
Pin Definitions and Functions of the C505L in Programming Mode
Symbol
RESET
PMSEL0
PMSEL1
PSEL
PRD
PALE
XTAL2
XTAL1
*) I = Input
Data Sheet
O = Output
Pin Number
P-MQFP-80
43
42
41
40
39
38
47
48
I/O *) Function
I
I
I
I
I
I
O
I
Reset
This input must be at static “1” (active) level during the whole
programming mode.
Programming Mode SELection pins
These pins are used to select the different access modes in
programming mode. PMSEL1,0 must satisfy a setup time to the
rising edge of PALE. When the logic level of PMSEL1,0 is
changed, PALE must be at low level.
Basic Programming Mode SELect
This input is used for the basic programming mode selection
and must be switched according to Figure 28.
Programming mode ReaD strobe
This input is used for read access control for OTP memory
read, version byte read, and lock-bit read operations.
Programming Address Latch Enable
PALE is used to latch the high address lines. The high address
lines must satisfy a setup and hold time to/from the falling edge
of PALE. PALE must be at a low level when the logic level of
PMSEL1,0 is changed.
XTAL2
Output of the inverting oscillator amplifier.
XTAL1
Input to the oscillator amplifier.
PMSEL1
0
0
1
1
54
PMSEL0
0
1
0
1
Access Mode
Reserved
Read signature bytes
Program/read lock-bits
Program/read OTP memory byte
C505L
06.99

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