SAK-C505L Infineon Technologies AG, SAK-C505L Datasheet - Page 59

• Manufacturer Part Number: SAK-C505L
• Description: 8-bit CMOS Microcontroller
• Manufacturer: Infineon Technologies AG

Table 12
Access Modes Selection
Access Mode
Program OTP memory byte
Read OTP memory byte
Program OTP lock bits
Read OTP lock bits
Read OTP version byte
Lock Bits Programming / Read
The C505L has two programmable lock-bits that, when programmed according to Table 13, provide
four levels of protection for the on-chip OTP code memory.
Table 13
Lock Bit Protection Types
Lock Bits at D1,D0
D1
1
1
0
0
Note: A “1” means that the lock-bit is not programmed. A “0” means that lock-bit is programmed.
Data Sheet
D0
1
0
1
0
Protection
Level
Level 0
Level 1
Level 2
Level 3
EA/
V
V
V
V
V
V
PP
IH
PP
IH
IH
PP
Protection Type
The OTP lock feature is disabled. During normal operation of
the C505L, the state of the EA pin is not latched on reset.
During normal operation of the C505L, MOVC instructions
executed from external program memory are prevented from
fetching code bytes from internal memory. EA is sampled and
latched on reset. An OTP memory read operation is only
possible in the OTP verification mode. Further programming of
the OTP memory is disabled (reprogramming security).
Same as level 1, but OTP memory read operation using OTP
verification mode is disabled.
Same as level 2, but external code execution by setting
EA = low during normal operation of the C505L is not possible.
External code execution, which is initiated by an internal
program (e.g. by an internal jump instruction above the OTP
memory boundary), is still possible.
PROG
H
H
H
57
PRD
H
H
1
H
H
L
PMSEL
0
H
L
H
Address
(Port 2)
A0-7
A8-14
–
Byte addr.
of sign. byte
Data
(Port 0)
D0-7
D1,D0 see
Table 13
D0-7
C505L
06.99