SAK-C505L Infineon Technologies AG, SAK-C505L Datasheet - Page 43

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SAK-C505L

Manufacturer Part Number
SAK-C505L
Description
8-bit CMOS Microcontroller
Manufacturer
Infineon Technologies AG
Datasheet

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10-Bit A/D Converter
The C505L includes a high performance / high speed 10-bit A/D-Converter (ADC) with 8 analog
input channels. It operates with a successive approximation technique and uses self calibration
mechanisms for reduction and compensation of offset and linearity errors. The A/D converter
provides the following features:
The 10-bit ADC uses two clock signals for operation: the conversion clock
input clock
XTAL pins. The input clock
frequency of 2 MHz. Therefore, the ADC clock prescaler must be programmed to a value which
assures that the conversion clock does not exceed 2 MHz. The prescaler ratio is selected by the
bits ADCL1 and ADCL0 of SFR ADCON1.
Figure 19
10-Bit A/D Converter Clock Selection
Data Sheet
– 8 multiplexed input channels (port 1), which can also be used as digital inputs/outputs
– 10-bit resolution
– Single or continuous conversion mode
– Internal start-of-conversion trigger capability
– Interrupt request generation after each conversion
– Using successive approximation conversion technique via a capacitor array
– Built-in hidden calibration of offset and linearity errors
MCU System Clock
Rate (
12 MHz
16 MHz
20 MHz
2 MHz
6 MHz
8 MHz
f
IN
f
OSC
f
(= 1/
OSC
)
t
IN
Conditions:
).
f
ADC
Clock Prescaler
÷
÷
÷
÷
16
32
ADCL1
8
4
f
is derived from the C505L system clock
IN
f
[MHz]
12
16
20
IN
2
6
8
is equal to
f
MUX
ADC max
ADCL0
= 2 MHz
f
Prescaler
Ratio
OSC
4
4
4
8
8
16
Conversion Clock f
Input Clock
The conversion
41
f
IN
= f
OSC
f
IN
f
[MHz]
0.5
1.5
2
1.5
2
1.25
ADC
=
CLP
ADC
1
f
ADC
ADCL1
0
0
0
0
0
1
clock is limited to a maximum
f
OSC
Converter
which is applied at the
f
ADC
A/D
MCS03867
(= 1/
ADCL0
0
0
0
1
1
0
t
ADC
) and the
C505L
06.99

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