CD4724BCN Fairchild Semiconductor, CD4724BCN Datasheet

IC ADDRESSABLE LATCH 8BIT 16PPIP

CD4724BCN

Manufacturer Part Number
CD4724BCN
Description
IC ADDRESSABLE LATCH 8BIT 16PPIP
Manufacturer
Fairchild Semiconductor
Series
4000Br
Datasheet

Specifications of CD4724BCN

Logic Type
D-Type, Addressable
Circuit
1:8
Output Type
Standard
Voltage - Supply
3 V ~ 15 V
Independent Circuits
1
Delay Time - Propagation
50ns
Current - Output High, Low
8.8mA, 8.8mA
Operating Temperature
-55°C ~ 125°C
Mounting Type
Through Hole
Package / Case
16-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
4724B

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CD4724BCN
Manufacturer:
NS/国半
Quantity:
20 000
© 1999 Fairchild Semiconductor Corporation
CD4724BCM
CD4724BCN
CD4724BC
8-Bit Addressable Latch
General Description
The CD4724BC is an 8-bit addressable latch with three
address inputs (A0–A2), an active low enable input (E),
active high clear input (CL), a data input (D) and eight out-
puts (Q0–Q7).
Data is entered into a particular bit in the latch when that is
addressed by the address inputs and the enable (E) is
LOW. Data entry is inhibited when enable (E) is HIGH.
When clear (CL) and enable (E) are HIGH, all outputs are
LOW. When clear (CL) is HIGH and enable (E) is LOW, the
channel demultiplexing occurs. The bit that is addressed
has an active output which follows the data input while all
unaddressed bits are held LOW. When operating in the
addressable latch mode (E
than one bit of the address could impose a transient wrong
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Order Number
Pin Assignments for DIP and SOIC
Package Number
Top View
M16A
N16E
CL
LOW), changing more
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
DS006003.prf
address. Therefore, this should only be done while in the
memory mode (E
Features
Truth Table
E CL
H
H
L
L
Wide supply voltage range:
High noise immunity: 0.45 V
Low power TTL compatibility:
Serial to parallel capability
Storage register capability
Random (addressable) data entry
Active high demultiplexing capability
Common active high clear
fan out of 2 driving 74L or 1 driving 74LS
H Follows Data
H Reset to “0”
L Follows Data
L Hold Previous
Package Description
Data
Addressed
Latch
HIGH, CL
Mode Selection
Holds Previous
Data
Holds Previous
Data
Reset to “0”
Reset to “0”
Unaddressed
Latch
October 1987
Revised January 1999
LOW).
DD
3.0V to 15V
(typ.)
www.fairchildsemi.com
Addressable
Latch
Memory
Demultiplexer
Clear
Mode

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CD4724BCN Summary of contents

Page 1

... CD4724BCM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body CD4724BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. ...

Page 2

Logic Diagram www.fairchildsemi.com 2 ...

Page 3

Absolute Maximum Ratings (Note 2) DC Supply Voltage ( Input Voltage ( Storage Temperature ( Power Dissipation ( Dual-In-Line Small Outline ) Lead Temperature (T L (Soldering, 10 seconds) ...

Page 4

AC Electrical Characteristics pF, R 200k, Input ns, unless otherwise noted Symbol Parameter t Propagation Delay PHL, tPLH Data to Output Propagation Delay PLH ...

Page 5

Switching Time Waveforms 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body www.fairchildsemi.com Package Number M16A 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN ...

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