74ABT16373CSSC Fairchild Semiconductor, 74ABT16373CSSC Datasheet
74ABT16373CSSC
Specifications of 74ABT16373CSSC
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74ABT16373CSSC Summary of contents
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... Enable (OE) is LOW. When OE is HIGH, the outputs are in high Z state. Ordering Code: Order Number Package Number 74ABT16373CSSC MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide 74ABT16373CMTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “ ...
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Functional Description The ABT16373 contains sixteen D-type latches with 3- STATE standard outputs. The device is byte controlled with each byte functioning identically, but independent of the other. Control pins can be shorted together to obtain full 16-bit operation. The ...
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Absolute Maximum Ratings Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias V Pin Potential to Ground Pin CC Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Any Output in the Disabled or Power-Off State in ...
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AC Electrical Characteristics (SOIC and SSOP Packages) Symbol Parameter t Propagation Delay PLH PHL Propagation Delay PLH PHL n t Output Enable Time PZH t PZL t Output Disable ...
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Physical Dimensions inches (millimeters) unless otherwise noted 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide Package Number MS48A 5 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...