100336QC Fairchild Semiconductor, 100336QC Datasheet
100336QC
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100336QC Summary of contents
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... M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 100336PC N24E 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide 100336QC V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square 100336QI V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Industrial Temperature Range ( Devices also available in Tape and Reel. Specify by appending the suffix letter “ ...
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Function Select Table Parallel Load Complement Shift Left Shift Right Count Down Clear ...
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Logic Diagram 3 www.fairchildsemi.com ...
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Absolute Maximum Ratings Storage Temperature (T ) STG Maximum Junction Temperature ( Pin Potential to Ground Pin EE Input Voltage (DC) Output Current (DC Output HIGH) ESD (Note 3) Commercial Version DC Electrical Characteristics 4.2V to 5.7V, ...
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Commercial Version (Continued) DIP AC Characteristics 4.2V to 5.7V GND EE CC CCA T C Symbol Parameter Min f Shift Frequency 300 SHIFT t Propagation Delay PLH 1. PHL n n ...
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SOIC and PLCC AC Electrical Characteristics 4.2V to 5.7V GND EE CC CCA Symbol Parameter Min f Shift Frequency 350 SHIFT t Propagation Delay PLH 1. PHL Propagation ...
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Industrial Version PLCC DC Electrical Characteristics 4.2V to 5.7V GND CCA Symbol Parameter Min V Output HIGH Voltage 1085 OH V Output LOW Voltage 1830 OL V Output HIGH Voltage 1095 OHC V Output ...
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Test Circuitry Notes 2V, V 2.5V CC CCA EE L1, L2 and L3 equal length 50 impedance lines R 50 terminator internal to scope T Decoupling 0.1 F from GND to V and All ...
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Switching Waveforms FIGURE 3. Propagation Delay (Clock) and Transition Times FIGURE 4. Propagation Delay (Reset) 9 www.fairchildsemi.com ...
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Switching Waveforms (Continued) FIGURE 5. Propagation Delay (Serial Data, Selects) Notes the minimum time before the transition of the clock that information must be present at the data input the minimum time after the transition ...
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Switching Waveforms (Continued) Note: *Decimal representation of binary outputs. Count Up Count Down Measurement taken at 50% point of waveform. FIGURE 9. Propagation Delay, Clock to Terminal ...
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Applications 3-Stage Divider, Preset Count Down Mode Note LOW, then T LOW www.fairchildsemi.com Slow Expansion Scheme Fast Expansion Scheme 12 ...
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Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide Package Number M24B Package Number N24E 13 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the ...