AM79C983AKCW AMD [Advanced Micro Devices], AM79C983AKCW Datasheet - Page 23

• Manufacturer Part Number: AM79C983AKCW
• Manufacturer: AMD [Advanced Micro Devices]

Synchronous Mode Operation
While operating in the synchronous mode, the expan-
sion bus pins are Data (DAT), JAM, Request (REQ),
Acknowledge (ACK), and Collision (COL). DAT and
JAM are bidirectional signals. REQ is an output. ACK
and COL are inputs.
Register
Configuration
Repeater Status
Device Configuration
Partition Change Interrupt
Runts with Good FCS Interrupt
Link Change Interrupt
Loopback Change Interrupt
Polarity Changed Interrupt
SQE Test No Change Interrupt
Source Address Changed Interrupt None
Intruder Interrupt
Source Address Match Interrupt
Data Rate Mismatch Interrupt
Transceiver Interface Status
Transceiver
Interrupt
Jabber Interrupt
Partition Change Interrupt Enable Masked
Runts with Good FCS Interrupt
Enable
Link Changed Interrupt Enable
Loopback
Enable
Polarity Changed Interrupts Enable Masked
SQE
Enable
Transceiver Loopback
Enable Interrupts
Source Address Match
Interrupt
MJLP
Repeater Reset
Management Reset
RAUI Direction
Loopback Test Mode
Table 2. Register Reset Default States
Test
Changed
Changed
Interface
Interrupt
Interrupt
Change
Default
Masked
Masked
No Error
Normal
Normal
Normal
Normal
Normal
None
None
None
None
None
None
None
None
No
Mismatch
No Trans. R
None
No Jabber R
Masked
Masked
Masked
Masked
P R E L I M I N A R Y
M
M, R
R
R
M, R
R
R
R
R
M, R
M, R
M, R
R
R
R
M,R
R
R
R
R
Am79C983A
The IMR2 device expansion scheme allows the use of
multiple IMR2 devices in a single-board repeater or in
a modular multiport repeater with a backplane architec-
ture. Data sent on the DAT line is in NRZ format and is
synchronized to MCLK. Another bidirectional pin, JAM,
is used to communicate internal IMR2 device status
from the single active IMR2 device to other IMR2 de-
vices in the system. This signal indicates whether the
active IMR2 device is in a collision state.
Arbitration for control of the bussed signals, DAT and
JAM, is provided by external circuitry. One output pin
(REQ) and two input pins (ACK and COL) are used as
arbitration signals. The IMR2 device asserts REQ to
Register
Source Address Changed Interrupt
Enable
Intruder Interrupt Enable
Multicast Address Pass Enable
Data Rate Mismatch Interrupt
Enable
Source Address Compare Enable Disabled M, R
Preferred
Enable
Transceiver
Interrupt Enable
Jabber Interrupt Enable
Alternative Partition
Link Test Enable
Link Pulse Enable
Reverse Polarity Enable
SQE Mask Enable
Port Enable
Port Mobility Control
Extended Distance Control Enable Disabled R
Source Address Automatic Intru-
sion Enable
Preferred Address Automatic Intru-
sion Enable
Last Source Address Lock Enable Disabled M, R
Partition Status
Link Status
Loopback Status
Polarity Status
SQE Test Status
Sample Counter Que
Packet Report Packet Size
Statistics Control
Stat Tag
FCS Tag
Address
Interface
Compare
Changed
Default
Masked
Masked
Disabled M, R
Masked
Disabled M, R
Masked
Masked
Disabled R
Enabled
Enabled
Disabled R
Disabled R
Enabled
XENA
Disabled R
Disabled R
Connect
Link Fail
No Error
Positive
No Error
Four
07FF‘
Disable
Disable
M
M,R
M, R
R
R
R
R
R
R
R
R
R
R
R
R
M, R
M, R
M, R
M, R
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