W6691CD WINBOND [Winbond], W6691CD Datasheet - Page 51

• Manufacturer Part Number: W6691CD
• Description: ISDN S/T Interface Transceiver
• Manufacturer: WINBOND [Winbond]

The relevant status bits are:
(Monitor Channel Data Receive) interrupt status. Alerted by the MDR interrupt, the microprocessor reads the
MOR register. When it is ready to accept data, it sets the “E” control bit MRC to 1 to enable the receiver to
store succeeding Monitor channel bytes and acknowledge them according to the Monitor channel protocol. In
addition, it enables other Monitor channel interrupts by setting Monitor Channel Interrupt Enable to 1.
MDA (Monitor Channel Data Acknowledge) interrupt status at the transmitter. A new Monitor channel data byte
can now be written by the microprocessor in MOX register. The “A” bit is still in the active (0) state. The
transmitter indicates a new byte in the Monitor channel by returning the “A” bit active after sending it once in
the inactive state. The receiver stores the Monitor channel byte in MOR register and generates a new MDR
interrupt status. When the microprocessor has read the MOR register , the receiver acknowledges the data by
returning the “E” bit active after sending it once in the inactive state. This in turn causes the transmitter to
generate a MDA interrupt status. This MDA interrupt Þ write data Þ MDR interrupt Þ read data Þ MDA
interrupt handshake procedure is repeated as long as the transmitter has data to send.
the Monitor channel Transmit Control bit MXC to 0. This enforces an inactive (1) state in the “A” bit. Two
frames of “A” inactive signifies the end of a message. Thus, a MER (Monitor channel End of Reception)
interrupt status is generated by the receiver when the “A” bit is received in the inactive state in two consecutive
frames. As a result, the microprocessor sets the “E” bit control bit MRC to 0, which in turn enforces an inactive
state in the “E” bit. This marks the end of the transmission, making the MAC (Monitor channel Active) bit return
to 0.
an inactive “E” bit value in two consecutive frames. This is effected by the microprocessor writing the “E” bit
control bit MRC to 0. An aborted transmission is indicated by a MAB (Monitor Channel Data Abort) interrupt
About the status bit MAC( Monitor Channel Transmit Active) indicates whether a transmission is progress.
The receiving device stores the Monitor byte in its MOR (Monitor Receive Channel) and generates a MDR
The first Monitor channel byte is acknowledged by the receiving device setting the “E” bit to 0. This causes a
When the last byte has been acknowledged by the receiver (MDA interrupt status), the microprocessor sets
During a transmission process, it is possible for the receiver to ask a transmission to be aborted by sending
For the reception of Monitor data: MDR (Monitor Channel Data Received )
of Reception)
For the transmission of Monitor data: MDA (Monitor Channel Data Acknowledged )
Channel Data Abort)
If set MAC = 0, the previous transmission has been terminated. Before starting a transmission, the
microprocessor should verify that the transmitter is inactive.
If set MAC = 1, after having written data into the Monitor Transmit Channel (MOX) register, the
microprocessor sets this bit to 1. This enables the “A” bit to go active (0), indicating the presence of valid
Monitor data (contents of MOX) in the corresponding frame.
51
Preliminary W6691
Publication Release Date: Sep 2001
MER (Monitor Channel End
MAB (Monitor
Revision 1.1