W6691CD WINBOND [Winbond], W6691CD Datasheet - Page 74

• Manufacturer Part Number: W6691CD
• Description: ISDN S/T Interface Transceiver
• Manufacturer: WINBOND [Winbond]

MRC0
Determines the value of the “E” bit:
0: “E” bit always “1”. In addition, the MDR0 interrupt is blocked, except for the first byte of a packet (if
MRE0=1).
1: “E” bit is internally controlled by the W6691 according to Monitor channel protocol.
In addition, the MDR0 interrupt is enabled for all received bytes according to the Monitor channel protocol (if
MRE0=1).
MIE0
Monitor interrupt status MDA0, MAB0 generation is enabled (1) or masked (0).
MXC0
Determines the value of the “A” bit:
0: “A” bit is always 1.
1: “A” bit is internally controlled by W6691 according to Monitor channel protocol.
8.8.10 GCI Mode Control/Status Register
Value after reset: 00H
MAC0
Data transmission is in progress in GCI mode Monitor channel 0.
0: the previous transmission has been terminated. Before starting a transmission, the microprocessor should
verify that the transmitter is inactive.
1: after having written data into the Monitor Transmit Channel 0 (MO0X) register, the microprocessor sets this
bit to 1.
This enables the “A” bit to go active (0), indicating the presence of valid Monitor channel data (contents of
MOX) in the corresponding frame.
MAC1
Data transmission is in progress in GCI mode Monitor channel 1.
MAC0
7
Monitor channel 0 Transmit Interrupt Enable
“A” bit Control
“E” Bit Control
MONITOR TRANSMIT CHANNEL 0 ACTIVE (READ ONLY)
Monitor Transmit Channel 1 Active (Read Only)
MAC1
6
5
0
4
0
74
GCR
3
0
2
0
Read
Preliminary W6691
Publication Release Date: Sep 2001
1
0
Address 26H
0
0
Revision 1.1