W6691CD WINBOND [Winbond], W6691CD Datasheet - Page 87

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W6691CD

Manufacturer Part Number
W6691CD
Description
ISDN S/T Interface Transceiver
Manufacturer
WINBOND [Winbond]
Datasheet
8.11 B1 Channel HDLC controller Register Memory Map
TABLE 8.8 B1 CHANNEL HDLC CONTROLLER REGISTER MEMORY MAP
8.11.1 B1_ch receive FIFO
The B1_RFIFO is a 128-byte depth FIFO memory with programmable threshold. The threshold value
determines when to generate an interrupt.
When more than a threshold length of data has been received, a RMR interrupt is generated. After an RMR
interrupt, 64 or 96 bytes can be read out, depending on the threshold setting.
In transparent mode, when the end of frame has been received, a RME interrupt is generated. After an RME
interrupt, the number of bytes available is less than or equal to the threshold value.
8.11.2 B1_ch transmit FIFO
The B1_XFIFO is a 128-byte depth FIFO with programmable threshold value. The threshold setting is the
same as B1_RFIFO.
Offset R/W
5A
5B
5C
5D
5E
50
51
52
53
54
55
56
57
58
59
5F
R
W
R/W
R/W
R_clr B1_EXIR
R/W
R
R/W
R/W
R/W
R/W
R
R
R/W
B1_RFIFO
B1_XFIFO
B1_CMDR RACK
B1_MODE MMS
B1_EXIM
B1_STAR
B1_ADM1 MA17
B1_ADM2 MA27
B1_ADR1 RA17
B1_ADR2 RA27
B1_RBCL RBC7
B1_RBCH
B1_IDLE
Name
IDLE7
7
0
1
0
0
RRST
ITF
RMR
RMR
RDOV
MA16
MA26
RA16
RA26
RBC6
IDLE6
B1_RFIFO
B1_XFIFO
6
0
RACT
RME
RME
CRCE
MA15
MA25
RA15
RA25
RBC5
LOV
IDLE5
5
0
87
XACT
RDOV
RDOV
RMB
MA14
MA24
RA14
RA24
RBC4
RBC12 RBC11
IDLE4
0
4
Reserved
Reserved
Read
Write
B1_128 SW56
MA13
MA23
RA13
RA23
RBC3
IDLE3
3
0
0
1
0
XMS
MA12
MA22
RA12
RA22
RBC2
RBC10 RBC9
IDLE2
XDOW
Preliminary W6691
Publication Release Date: Sep 2001
2
0
1
Address 50H
Address 51H
XME
FTS1
XFR
XFR
MA11
MA21
RA11
RA21
RBC1
IDLE1
1
0
XRST
RA20
FTS0
XDUN
XDUN
XBZ
MA10
MA20
RA10
RBC0
RBC8
IDLE0
0
Revision 1.1

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