S9S12G64F0CLFR Freescale Semiconductor, S9S12G64F0CLFR Datasheet - Page 69

• Manufacturer Part Number: S9S12G64F0CLFR
• Description: 16-bit Microcontrollers - MCU S12 Core,64K FLASH AU
• Manufacturer: Freescale Semiconductor

Specifications of S9S12G64F0CLFR

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 1 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit, 12 bit
• A/d Channels Available: 12
• Interface Type: SPI
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 40
• Number Of Timers: 8
• Program Memory Type: Flash
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 3.13 V

1
1.8.3
1.8.3.1
Freescale Semiconductor
Package Pin
The regular I/O characteristics (see
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
S12GN48
Pinout 32-Pin LQFP
PAD11
VDDA
VSSA
PAD3
PAD4
PAD5
PAD6
PAD7
PM0
PM1
PS0
PS1
PS2
PS3
PS4
PS5
PS6
PS7
Pin
Table 1-11. 48-Pin LQFP/QFN Pinout for S12GNA16 and S12GNA32
<----lowest-----PRIORITY-----highest---->
API_EXTCLK
KWAD11
KWAD3
KWAD4
KWAD5
KWAD6
KWAD7
MISO0
MOSI0
Func.
RXD0
TXD0
SCK0
VRH
2nd
—
—
—
—
—
Section A.2, “I/O
MC9S12G Family Reference Manual, Rev.1.23
ACMPM
Function
Func.
ECLK
AN3
AN4
AN5
AN6
AN7
3rd
—
—
—
—
—
—
—
—
—
—
—
Characteristics”) apply if the EXTAL/XTAL function is disabled
Func
SS0
4th
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Func
5th
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Supply
Power
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
DDA
DDA
DDA
DDA
DDA
DDA
—
—
DDX
DDX
DDX
DDX
DDX
DDX
DDX
DDX
DDX
DDX
PER1AD/PPS1AD
PER0AD/PPS0AD
PER1AD/PPS1AD
PER1AD/PPS0AD
PER1AD/PPS1AD
PER1AD/PPS1AD
Device Overview MC9S12G-Family
PERM/PPSM
PERM/PPSM
PERS/PPSS
PERS/PPSS
PERS/PPSS
PERS/PPSS
PERS/PPSS
PERS/PPSS
PERS/PPSS
PERS/PPSS
CTRL
—
—
Internal Pull
Resistor
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Reset
State
Up
Up
Up
Up
Up
Up
Up
Up
—
—
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